Jian Wang

Affiliations:
  • National University of Defense Technology, School of Electronic Science and Engineering, Changsha, China
  • Swiss Federal Institute of Technology, Integrated Systems Laboratory, Zürich, Switzerland (2015 - 2016)


According to our database1, Jian Wang authored at least 7 papers between 2015 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2021
A Memory-Reduced Frequency Estimator for the Measurement of Sinusoidal Signal.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

2020
Scheduling of Data Access for the Radix-2k FFT Processor Using Single-Port Memory.
IEEE Trans. Very Large Scale Integr. Syst., 2020

2019
A Parallel Radix-2<sup>k</sup> FFT Processor using Single-Port Merged-Bank Memory.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2017
Parallel List Decoding of Convolutional Codes: Algorithm and Implementation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

2016
A Mixed-Decimation MDF Architecture for Radix-2<sup>k</sup> Parallel FFT.
IEEE Trans. Very Large Scale Integr. Syst., 2016

Design of QPP Interleavers for the Parallel Turbo Decoding Architecture.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016

2015
Fixed-Point Analysis and Parameter Optimization of the Radix-2<sup>k</sup> Pipelined FFT Processor.
IEEE Trans. Signal Process., 2015


  Loading...