Jian Zhang

Orcid: 0000-0002-8353-6243

Affiliations:
  • National University of Defense Technology, College of Computer, Changsha, China


According to our database1, Jian Zhang authored at least 9 papers between 2018 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Bibliography

2021
Advancing DSP into HPC, AI, and beyond: challenges, mechanisms, and future directions.
CCF Trans. High Perform. Comput., 2021

Efficient Memory Access-Aware BWA-SMEM Seeding Accelerator for Genome Sequencing.
Proceedings of the 2021 IEEE 23rd Int Conf on High Performance Computing & Communications; 7th Int Conf on Data Science & Systems; 19th Int Conf on Smart City; 7th Int Conf on Dependability in Sensor, 2021

Universal Pre-Calculating Structure: Reducing Complexity of Ising Chips with Arbitrary Connectivity.
Proceedings of the Sixth IEEE International Conference on Data Science in Cyberspace, 2021

2020
AIM: Annealing in Memory for Vision Applications.
Symmetry, 2020

Novel probability flipping method for ising annealing chip using circuit unreliability.
Microelectron. J., 2020

2019
A Novel DSP Architecture for Scientific Computing and Deep Learning.
IEEE Access, 2019

2018
Advancing CMOS-Type Ising Arithmetic Unit into the Domain of Real-World Applications.
IEEE Trans. Computers, 2018

Pre-Calculating Ising Memory: Low Cost Method to Enhance Traditional Memory with Ising Ability.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Live Demonstration: Image Segmentation on the FPGA-based Pre-calculating Ising Memory.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018


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