Jichun Bu

According to our database1, Jichun Bu authored at least 9 papers between 1988 and 2013.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2013
A Hybrid Reconfigurable System for Parallel and Intensive Computation.
Proceedings of the 10th IEEE International Conference on High Performance Computing and Communications & 2013 IEEE International Conference on Embedded and Ubiquitous Computing, 2013

Design of a hybrid reconfigurable coprocessor.
Proceedings of the IEEE 10th International Conference on ASIC, 2013

1994
A parallel system for photo realistic artificial scene rendering.
Proceedings of the International Conference on Application Specific Array Processors, 1994

1991
Processor clustering for the design of optimal fixed-size systolic arrays.
Proceedings of the Application Specific Array Processors, 1991

1990
Real time application of the floating point pipeline CORDIC processor in massive-parallel pipelined DSP algorithms.
Proceedings of the 1990 International Conference on Acoustics, 1990

Systolic array implementation of nested loop programs.
Proceedings of the Application Specific Array Processors, 1990

A design methodology for fixed-size systolic arrays.
Proceedings of the Application Specific Array Processors, 1990

1989
A VLSI system architecture for high-speed radiative transfer 3D image synthesis.
Vis. Comput., 1989

1988
Converting sequential iterative algorithms to recurrent equations for automatic design of systolic arrays.
Proceedings of the IEEE International Conference on Acoustics, 1988


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