Ed F. Deprettere

According to our database1, Ed F. Deprettere authored at least 116 papers between 1982 and 2013.

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Awards

IEEE Fellow

IEEE Fellow 1996, "For contributions in algorithm and architecture design for adaptive signal processing.".

Timeline

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Bibliography

2013
Multidimensional Dataflow Graphs.
, 2013


2012
Special session on "aspects of Cyber-Physical Systems".
Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012

2011
USHA: Unified software and hardware architecture for video decoding.
Proceedings of the IEEE 9th Symposium on Application Specific Processors, 2011

2010
Dynamic and Multidimensional Dataflow Graphs.
Proceedings of the Handbook of Signal Processing Systems, 2010

2009
Realizing FIFO Communication When Mapping Kahn Process Networks onto the Cell.
Proceedings of the Embedded Computer Systems: Architectures, 2009

Introduction to Mastering Cell BE and GPU Execution Platforms.
Proceedings of the Embedded Computer Systems: Architectures, 2009

2008
Systematic and Automated Multiprocessor System Design, Programming, and Implementation.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2008

Deriving efficient control in Process Networks with Compaan/Laura.
IJES, 2008

Automated Integration of Dedicated Hardwired IP Cores in Heterogeneous MPSoCs Designed with ESPAM.
EURASIP J. Emb. Sys., 2008

Hierarchical run time deadlock detection in process networks.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2008

Tool Integration and Interoperability Challenges of a System-Level Design Flow: A Case Study.
Proceedings of the Embedded Computer Systems: Architectures, 2008

Daedalus: toward composable multimedia MP-SoC design.
Proceedings of the 45th Design Automation Conference, 2008

2007
Parameterized Looped Schedules for Compact Representation of Execution Sequences in DSP Hardware and Software Implementation.
IEEE Trans. Signal Processing, 2007

Classifying interprocess communication in process network representation of nested-loop programs.
ACM Trans. Embedded Comput. Syst., 2007

Transforming Signal Processing Applications into Parallel Implementations.
EURASIP J. Adv. Sig. Proc., 2007

Efficient External Memory Interface for Multi-processor Platforms Realized on FPGA Chips.
Proceedings of the FPL 2007, 2007

A framework for rapid system-level exploration, synthesis, and programming of multimedia MP-SoCs.
Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, 2007

2006
Requirements for Interfacing IP-Components in Re-configurable Platforms.
VLSI Signal Processing, 2006

Efficient Automated Synthesis, Programing, and Implementation of Multi-Processor Platforms on FPGA Chips.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

FPGA Implementation of a Prototype Hierarchical Control Network for Large-Scale Signal Processing Applications.
Proceedings of the Euro-Par 2006, Parallel Processing, 12th International Euro-Par Conference, Dresden, Germany, August 28, 2006

Multi-processor system design with ESPAM.
Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, 2006

Affine Nested Loop Programs and their Binary Parameterized Dataflow Graph Counterparts.
Proceedings of the 2006 IEEE International Conference on Application-Specific Systems, 2006

2005
Solving Out-of-Order Communication in Kahn Process Networks.
VLSI Signal Processing, 2005

FPL-3E: Towards Language Support for Reconfigurable Packet Processing.
Proceedings of the Embedded Computer Systems: Architectures, 2005

Communication Synthesis in a multiprocessor environment.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

Modeling and FPGA Implementation of Applications Using Parameterized Process Networks with Non-Static Parameters.
Proceedings of the 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 2005

Expression Synthesis in Process Networks generated by LAURA.
Proceedings of the 16th IEEE International Conference on Application-Specific Systems, 2005

Behavioral specification of control interface for signal processing applications.
Proceedings of the 16th IEEE International Conference on Application-Specific Systems, 2005

2004
An Integer Linear Programming Approach to Classify the Communication in Process Networks.
Proceedings of the Software and Compilers for Embedded Systems, 8th International Workshop, 2004

Constraints Derivation and Propagation for Large-Scale Embedded Systems Exploration.
Proceedings of the Computer Systems: Architectures, 2004

On the (Re-)Use of IP-Components in Re-configurable Platforms.
Proceedings of the Computer Systems: Architectures, 2004

Communication Optimization in Compaan Process Networks.
Proceedings of the Computer Systems: Architectures, 2004

Architecture Exploration of a Large Scale System.
Proceedings of the 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 2004

Increasing Pipelined IP Core Utilization in Process Networks Using Exploration.
Proceedings of the Field Programmable Logic and Application, 2004

System Design Using Kahn Process Networks: The Compaan/Laura Approach.
Proceedings of the 2004 Design, 2004

Translating affine nested-loop programs to process networks.
Proceedings of the 2004 International Conference on Compilers, 2004

A Hierarchical Classification Scheme to Derive Interprocess Communication in Process Networks.
Proceedings of the 15th IEEE International Conference on Application-Specific Systems, 2004

2003
Modeling Stream-Based Applications Using the SBF Model of Computation.
VLSI Signal Processing, 2003

Analysis of joint angle-frequency estimation using ESPRIT.
IEEE Trans. Signal Processing, 2003

Laura: Leiden Architecture Research and Exploration Tool.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

Fast and Accurate Multiprocessor Architecture Exploration with Symbolic Programs.
Proceedings of the 2003 Design, 2003

Deriving process networks from weakly dynamic applications in system-level design.
Proceedings of the 1st IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2003

Context-Aware Process Networks.
Proceedings of the 14th IEEE International Conference on Application-Specific Systems, 2003

2002
Compilation From Matlab to Process Networks Realized in FPGA.
Design Autom. for Emb. Sys., 2002

Preface.
Design Autom. for Emb. Sys., 2002

A Methodology to Design Programmable Embedded Systems - The Y-Chart Approach.
Proceedings of the Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation, 2002

Translating Imperative Affine Nested Loop Programs into Process Networks.
Proceedings of the Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation, 2002

Algorithmic transformation techniques for efficient exploration of alternative application instances.
Proceedings of the Tenth International Symposium on Hardware/Software Codesign, 2002

A Compile Time Based Approach for Solving Out-of-Order Communication in Kahn Process Networks.
Proceedings of the 13th IEEE International Conference on Application-Specific Systems, 2002

2001
A Methodology for Architecture Exploration of Heterogeneous Signal Processing Systems.
VLSI Signal Processing, 2001

A unified algebraic transformation approach for parallel recursive and adaptive filtering and SVD algorithms.
IEEE Trans. Signal Processing, 2001

Exploring Embedded-Systems Architectures with Artemis.
IEEE Computer, 2001

System Level Design with Spade: an M-JPEG Case Study.
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

A trace transformation technique for communication refinement.
Proceedings of the Ninth International Symposium on Hardware/Software Codesign, 2001

2000
A Floating Point Vectoring Algorithm Based on Fast Rotations.
VLSI Signal Processing, 2000

Guest Editor's Introduction.
VLSI Signal Processing, 2000

Efficient implementations of pipelined CORDIC based IIR digital filters using fast orthonormal μ-rotations.
IEEE Trans. Signal Processing, 2000

Annihilation-reordering look-ahead pipelined CORDIC-based RLS adaptive filters and their application to adaptive beamforming.
IEEE Trans. Signal Processing, 2000

Deriving Process Networks from Nested Loop Algorithms.
Parallel Processing Letters, 2000

Analysis of ESPRIT based joint angle-frequency estimation.
Proceedings of the IEEE International Conference on Acoustics, 2000

Compaan: deriving process networks from Matlab for embedded signal processing architectures.
Proceedings of the Eighth International Workshop on Hardware/Software Codesign, 2000

High Level Modeling for Parallel Executions of Nested Loop Algorithms.
Proceedings of the 12th IEEE International Conference on Application-Specific Systems, 2000

1999
A Clustering Approach to Explore Grain-Sizes in the Definition of Processing Elements in Dataflow Architectures.
VLSI Signal Processing, 1999

Multiresolution ESPRIT algorithm.
IEEE Trans. Signal Processing, 1999

Derivation of parallel and pipelined orthogonal filter architectures via algorithm transformations.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

A Floating Point Vectoring Algorithm Based on Fast Rotations.
Proceedings of the 25th EUROMICRO '99 Conference, 1999

1998
Efficient Partitioning of Algorithms for Long Convolutions and their Mapping onto Architectures.
VLSI Signal Processing, 1998

Waveform interpolation coding with pitch-spaced subbands.
Proceedings of the 5th International Conference on Spoken Language Processing, Incorporating The 7th Australian International Speech Science and Technology Conference, Sydney Convention Centre, Sydney, Australia, 30th November, 1998

Robust exponential modeling of audio signals.
Proceedings of the 1998 IEEE International Conference on Acoustics, 1998

Pipelined CORDIC based QRD-MVDR adaptive beamforming.
Proceedings of the 1998 IEEE International Conference on Acoustics, 1998

Joint angle-frequency estimation using multi-resolution ESPRIT.
Proceedings of the 1998 IEEE International Conference on Acoustics, 1998

The construction of a retargetable simulator for an architecture template.
Proceedings of the Sixth International Workshop on Hardware/Software Codesign, 1998

1997
Quantization using wavelet based temporal decomposition of the LSF.
Proceedings of the Fifth European Conference on Speech Communication and Technology, 1997

Pipelining of cordic based IIR digital filters.
Proceedings of the 1997 IEEE International Conference on Acoustics, 1997

Perceptual entropy rate estimates for the phonemes of American English.
Proceedings of the 1997 IEEE International Conference on Acoustics, 1997

A strategy for determining a Jacobi specific dataflow processor.
Proceedings of the 1997 International Conference on Application-Specific Systems, 1997

An Approach for Quantitative Analysis of Application-Specific Dataflow Architectures.
Proceedings of the 1997 International Conference on Application-Specific Systems, 1997

Fast Rotations: Low-cost Arithmetic Methods for Orthonormal Rotation.
Proceedings of the 13th Symposium on Computer Arithmetic (ARITH-13 '97), 1997

1996
A fully pipelined RLS-based array for channel equalization.
VLSI Signal Processing, 1996

Engineering multirate convolutions for radar imaging.
Proceedings of the 1996 IEEE International Conference on Acoustics, 1996

State space behavior in time-varying biorthogonal filter banks.
Proceedings of the 8th European Signal Processing Conference, 1996

Jacobi-Specific Processor Arrays.
Proceedings of the 1996 International Conference on Application-Specific Systems, 1996

1995
Scalable parallel processor array for Jacobi-type matrix computations.
Integration, 1995

A parallel image-rendering algorithm and architecture based on ray tracing and radiosity shading.
Computers & Graphics, 1995

On the derivation of parallel filter structures for adaptive eigenvalue and singular value decompositions.
Proceedings of the 1995 International Conference on Acoustics, 1995

1994
Parallel and adaptive high-resolution direction finding.
IEEE Trans. Signal Processing, 1994

Direction finding of multiple wide-band emitters using state-space modeling.
Signal Processing, 1994

Is it Possible to achieve a Teraflop/s on a chip? From High Performance Algorithms to Architectures.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

A 'Jacobi' signal processing unit for time-adaptive SVD.
Proceedings of ICASSP '94: IEEE International Conference on Acoustics, 1994

A parallel system for photo realistic artificial scene rendering.
Proceedings of the International Conference on Application Specific Array Processors, 1994

1993
Example of combined algorithm development and architecture design.
Integration, 1993

Subband filtering: Cordic modulation and systolic quadrature mirror filter tree.
Proceedings of the International Conference on Application-Specific Array Processors, 1993

Floating point Cordic.
Proceedings of the 11th Symposium on Computer Arithmetic, 29 June, 1993

1992
Azimuth and elevation computation in high resolution DOA estimation.
IEEE Trans. Signal Processing, 1992

Parallel architecture for a pel-recursive motion estimation algorithm.
IEEE Trans. Circuits Syst. Video Techn., 1992

A Parallel-Pipelined Multiprocessor System for the Radiosity Method.
Proceedings of the EGGH92: Eurographics Workshop on Graphics Hardware 1992, 1992

1991
Introduction.
VLSI Signal Processing, 1991

Parallel VLSI matrix pencil algorithm for high resolution direction finding.
IEEE Trans. Signal Processing, 1991

A hardware design system based on object-oriented principles.
Proceedings of the conference on European design automation, 1991

Space Partitioning for Mapping Radiosity Computations onto a Pipelined Parallel Architecture (II).
Proceedings of the Rendering, 1991

Design and implementation of a floating-point quasi-systolic general purpose CORDIC rotator for high-rate parallel data and signal processing.
Proceedings of the 10th IEEE Symposium on Computer Arithmetic, 1991

1990
A model for the high-level description and simulation of VLSI networks.
IEEE Micro, 1990

A New Space Partitioning for Mapping Computations of the Radiosity Method onto a Highly Pipelined Parallel Architecture.
Proceedings of the Rendering, 1990

1989
A systolic algorithm and architecture for solving sets of linear equations with multi-band coefficient matrix.
VLSI Signal Processing, 1989

A VLSI system architecture for high-speed radiative transfer 3D image synthesis.
The Visual Computer, 1989

A Hardware Algorithm for Fast Realistic Image Synthesis.
Proceedings of the Advances in Computer Graphics Hardware IV (Eurographics'89 Workshop), 1989

A New Model for the High Level Description and Simulation of VLSI Networks.
Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989

1988
A class of analysis-by-synthesis predictive coders for high quality speech coding at rates between 4.8 and 16 kbit/s.
IEEE Journal on Selected Areas in Communications, 1988

Design of a Concurrent Computer for Solving Systems of Linear Equations.
Proceedings of the 15th Annual International Symposium on Computer Architecture, 1988

1986
Regular-pulse excitation-A novel approach to effective and efficient multipulse coding of speech.
IEEE Trans. Acoustics, Speech, and Signal Processing, 1986

Design and VLSI Implementation of a Concurrent Solver for N-Coupled Least-Squares Fitting Problems.
IEEE Journal on Selected Areas in Communications, 1986

1984
Experimental evaluation of different approaches to the multi-pulse coder.
Proceedings of the IEEE International Conference on Acoustics, 1984

Pipelined cordic architectures for fast VLSI filtering and array processing.
Proceedings of the IEEE International Conference on Acoustics, 1984

1983
Synthesis and fixed-point implementation of pipelined true orthogonal filters.
Proceedings of the IEEE International Conference on Acoustics, 1983

1982
Fast non-stationary lattice recursions for adaptive modeling and estimation.
Proceedings of the IEEE International Conference on Acoustics, 1982


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