Jinfeng Liu

Affiliations:
  • University of California, Irvine, Center for Embedded Computer Systems, CA, USA
  • Tsinghua University, China (former)


According to our database1, Jinfeng Liu authored at least 14 papers between 2001 and 2007.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2007
Idle energy minimization by mode sequence optimization.
ACM Trans. Design Autom. Electr. Syst., 2007

2006
Tapper: a lightweight scripting engine for highly constrained wireless sensor nodes.
Proceedings of the Fifth International Conference on Information Processing in Sensor Networks, 2006

2005
B#: A Battery Emulator and Power-Profiling Instrument.
IEEE Des. Test Comput., 2005

Eco: an ultra-compact low-power wireless sensor node for real-time motion monitoring.
Proceedings of the Fourth International Symposium on Information Processing in Sensor Networks, 2005

2004
Distributed Embedded Systems for Low Power: A Case Study.
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004

Optimizing mode transition sequences in idle intervals for component-level and system-level energy minimization.
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

2003
B#: a battery emulator and power profiling instrument.
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003

Energy Optimization of Distributed Embedded Processors by Combined Data Compression and Functional Partitioning.
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003

2002
IMPACCT: Methodology and Tools for Power-Aware Embedded Systems.
Des. Autom. Embed. Syst., 2002

Power-Aware Task Motion for Enhancing Dynamic Range of Embedded Systems with Renewable Energy Sources.
Proceedings of the Power-Aware Computer Systems, Second International Workshop, 2002

Combined Functional Partitioning and Communication Speed Selection for Networked Voltage-Scalable Processors.
Proceedings of the 15th International Symposium on System Synthesis (ISSS 2002), 2002

Communication speed selection for embedded systems with networked voltage-scalable processors.
Proceedings of the Tenth International Symposium on Hardware/Software Codesign, 2002

2001
Power-Aware Scheduling under Timing Constraints for Mission-Critical Embedded Systems.
Proceedings of the 38th Design Automation Conference, 2001

A constraint-based application model and scheduling techniques for power-aware systems.
Proceedings of the Ninth International Symposium on Hardware/Software Codesign, 2001


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