Jing Xie

Affiliations:
  • Shanghai Jiao Tong University, Shanghai, China


According to our database1, Jing Xie authored at least 9 papers between 2008 and 2015.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2015
A crosstalk avoidance scheme based on re-layout of signal TSV.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

Fault detection and redundancy design for TSVs in 3D ICs.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

2013
Modeling and analysis of signal transmission with Through Silicon Via (TSV) noise coupling.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

A novel architecture scheme with adaptive pipeline coupling technique for DSP processor design.
Proceedings of the IEEE 10th International Conference on ASIC, 2013

TSVs-aware floorplanning for 3D integrated circuit.
Proceedings of the IEEE 10th International Conference on ASIC, 2013

2011
On-chip structure and addressing scheme design for 2-D block data processing in a 64-core array system.
Proceedings of the IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, 2011

A reconfigurable linear array processor architecture for data parallel and computation intensive applications.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

A novel hardware prefetching scheme exploiting 2-D spatial locality in multimedia applications.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

2008
A Hybrid Anti-Collision Algorithm for RFID with Enhanced Throughput and Reduced Memory Consumption.
Proceedings of the 2008 IEEE/IPIP International Conference on Embedded and Ubiquitous Computing (EUC 2008), 2008


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