Jiteshri Dasari

According to our database1, Jiteshri Dasari authored at least 7 papers between 2022 and 2026.

Collaborative distances:

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
Universal Formal Verification Approach for Modular Reduction Circuits.
Proceedings of the 39th International Conference on VLSI Design & 25th International Conference on Embedded Systems, 2026

2024
Verification and Debugging of Modular (2<sup>n</sup> - 1) Multipliers Using Linear Algebra Technique.
Proceedings of the VLSI-SoC: Technology Advancement on SoC Design - 32nd IFIP/IEEE International Conference on Very Large Scale Integration, 2024

Linear Algebra Approach to Verification of Modular $(2^{n}-1)$ Multipliers.
Proceedings of the 32nd IFIP/IEEE International Conference on Very Large Scale Integration, 2024

Combining Formal Verification and Testing for Debugging of Arithmetic Circuits.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

2023
Efficient Formal Verification and Debugging of Arithmetic Divider Circuits.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

Formal Verification of Restoring Dividers made Fast and Simple.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022
Functional Verification of Arithmetic Circuits: Survey of Formal Methods.
Proceedings of the 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2022


  Loading...