Jochen Schleifer

According to our database, Jochen Schleifer authored at least 4 papers between 2010 and 2013.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2013

High-level modeling and synthesis for embedded FPGAs.

Xiaolin Chen, Shuai Li, Jochen Schleifer, Thomas Coenen, Anupam Chattopadhyay, Gerd Ascheid, Tobias G. Noll

Proceedings of the Design, Automation and Test in Europe, 2013

2011

Statistical modeling of reliability in logic devices.

Jochen Schleifer, Thomas Coenen, Tobias G. Noll

Microelectron. Reliab., 2011

2010

Interconnect routing of embedded FPGAs using standard VLSI routing tools.

Thomas Coenen, Jochen Schleifer, Oliver Weiß, Tobias G. Noll

Proceedings of the 2010 International Symposium on System on Chip, SoC 2010, Tampere, 2010

Reconfigurable Components for Application-Specific Processor Architectures.

Tobias G. Noll, Thorsten von Sydow, Bernd Neumann, Jochen Schleifer, Thomas Coenen, Götz Kappen

Proceedings of the Dynamically Reconfigurable Systems - Architectures, 2010