Johannes de Fine Licht

Orcid: 0000-0002-1500-7411

According to our database1, Johannes de Fine Licht authored at least 21 papers between 2018 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

Online presence:

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Bibliography

2023
Co-design Hardware and Algorithm for Vector Search.
CoRR, 2023

Co-design Hardware and Algorithm for Vector Search.
Proceedings of the International Conference for High Performance Computing, 2023

Streaming Task Graph Scheduling for Dataflow Architectures.
Proceedings of the 32nd International Symposium on High-Performance Parallel and Distributed Computing, 2023

2022
Python FPGA Programming with Data-Centric Multi-Level Design.
CoRR, 2022

Lifting C semantics for dataflow optimization.
Proceedings of the ICS '22: 2022 International Conference on Supercomputing, Virtual Event, June 28, 2022

Temporal Vectorization: A Compiler Approach to Automatic Multi-Pumping.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

Fast Arbitrary Precision Floating Point on FPGA.
Proceedings of the 30th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2022

2021
Productive FPGA Programming for High-Performance Computing.
PhD thesis, 2021

Transformations of High-Level Synthesis Codes for High-Performance Computing.
IEEE Trans. Parallel Distributed Syst., 2021

Productivity, portability, performance: data-centric Python.
Proceedings of the International Conference for High Performance Computing, 2021

StencilFlow: Mapping Large Stencil Programs to Distributed Spatial Computing Systems.
Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization, 2021

2020
Substream-Centric Maximum Matchings on FPGA.
ACM Trans. Reconfigurable Technol. Syst., 2020

fBLAS: streaming linear algebra on FPGA.
Proceedings of the International Conference for High Performance Computing, 2020

Flexible Communication Avoiding Matrix Multiplication on FPGA with High-Level Synthesis.
Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

2019
hlslib: Software Engineering for Hardware Design.
CoRR, 2019

Graph Processing on FPGAs: Taxonomy, Survey, Challenges.
CoRR, 2019

Stateful Dataflow Multigraphs: A Data-Centric Model for High-Performance Parallel Programs.
CoRR, 2019

Streaming message interface: high-performance distributed memory programming on reconfigurable hardware.
Proceedings of the International Conference for High Performance Computing, 2019

Stateful dataflow multigraphs: a data-centric model for performance portability on heterogeneous architectures.
Proceedings of the International Conference for High Performance Computing, 2019

Substream-Centric Maximum Matchings on FPGA.
Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

2018
Designing scalable FPGA architectures using high-level synthesis.
Proceedings of the 23rd ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2018


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