Runbin Shi

According to our database, Runbin Shi authored at least 22 papers between 2015 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Co-design Hardware and Algorithm for Vector Search.

Wenqi Jiang, Shigang Li, Yu Zhu, Johannes de Fine Licht, Zhenhao He, Runbin Shi, Cédric Renggli, Shuai Zhang, Theodoros Rekatsinas, Torsten Hoefler, Gustavo Alonso

CoRR, 2023

Co-design Hardware and Algorithm for Vector Search.

Wenqi Jiang, Shigang Li, Yu Zhu, Johannes de Fine Licht, Zhenhao He, Runbin Shi, Cédric Renggli, Shuai Zhang, Theodoros Rekatsinas, Torsten Hoefler, Gustavo Alonso

Proceedings of the International Conference for High Performance Computing, 2023

2022

Exploiting HBM on FPGAs for Data Processing.

Runbin Shi, Kaan Kara, Christoph Hagleitner, Dionysios Diamantopoulos, Dimitris Syrivelis, Gustavo Alonso

ACM Trans. Reconfigurable Technol. Syst., 2022

Radio Frequency Fingerprinting on the Edge.

Tong Jian, Yifan Gong, Zheng Zhan, Runbin Shi, Nasim Soltani, Zifeng Wang, Jennifer G. Dy, Kaushik R. Chowdhury, Yanzhi Wang, Stratis Ioannidis

IEEE Trans. Mob. Comput., 2022

ECI: a Customizable Cache Coherency Stack for Hybrid FPGA-CPU Architectures.

Abishek Ramdas, Michael Giardino, Runbin Shi, Adam Turowski, David A. Cock, Gustavo Alonso, Timothy Roscoe

CoRR, 2022

2021

O3BNN-R: An Out-of-Order Architecture for High-Performance and Regularized BNN Inference.

Tong Geng, Ang Li, Tianqi Wang, Chunshu Wu, Yanfei Li, Runbin Shi, Wei Wu, Martin C. Herbordt

IEEE Trans. Parallel Distributed Syst., 2021

Adversarial Hardware With Functional and Topological Camouflage.

He Li, Ameer Abdelhadi, Runbin Shi, Jiliang Zhang, Qiang Liu

IEEE Trans. Circuits Syst. II Express Briefs, 2021

Mix and Match: A Novel FPGA-Centric Deep Neural Network Quantization Framework.

Sung-En Chang, Yanyu Li, Mengshu Sun, Runbin Shi, Hayden K. H. So, Xuehai Qian, Yanzhi Wang, Xue Lin

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

2020

MSP: An FPGA-Specific Mixed-Scheme, Multi-Precision Deep Neural Network Quantization Framework.

Sung-En Chang, Yanyu Li, Mengshu Sun, Weiwen Jiang, Runbin Shi, Xue Lin, Yanzhi Wang

CoRR, 2020

AWB-GCN: A Graph Convolutional Network Accelerator with Runtime Workload Rebalancing.

Tong Geng, Ang Li, Runbin Shi, Chunshu Wu, Tianqi Wang, Yanfei Li, Pouya Haghi, Antonino Tumeo, Shuai Che, Steven K. Reinhardt, Martin C. Herbordt

Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020

CSB-RNN: a faster-than-realtime RNN acceleration framework with compressed structured blocks.

Runbin Shi, Peiyan Dong, Tong Geng, Yuhao Ding, Xiaolong Ma, Hayden Kwok-Hay So, Martin C. Herbordt, Ang Li, Yanzhi Wang

Proceedings of the ICS '20: 2020 International Conference on Supercomputing, 2020

Dynamic Sparse Training: Find Efficient Sparse Network From Scratch With Trainable Masked Layers.

Junjie Liu, Zhe Xu, Runbin Shi, Ray C. C. Cheung, Hayden Kwok-Hay So

Proceedings of the 8th International Conference on Learning Representations, 2020

FTDL: An FPGA-tailored Architecture for Deep Learning Systems.

Runbin Shi, Yuhao Ding, Xuechao Wei, Hang Liu, Hayden Kwok-Hay So, Caiwen Ding

Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

FTDL: A Tailored FPGA-Overlay for Deep Learning with High Scalability.

Runbin Shi, Yuhao Ding, Xuechao Wei, He Li, Hang Liu, Hayden Kwok-Hay So, Caiwen Ding

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019

A Real-Time Coprime Line Scan Super-Resolution System for Ultra-Fast Microscopy.

Runbin Shi, Justin S. J. Wong, Edmund Y. Lam, Kevin K. Tsia, Hayden Kwok-Hay So

IEEE Trans. Biomed. Circuits Syst., 2019

High-Throughput Line Buffer Microarchitecture for Arbitrary Sized Streaming Image Processing.

Runbin Shi, Justin S. J. Wong, Hayden Kwok-Hay So

J. Imaging, 2019

E-LSTM: Efficient Inference of Sparse LSTM on Embedded Heterogeneous System.

Runbin Shi, Junjie Liu, Hayden Kwok-Hay So, Shuo Wang, Yun Liang

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2017

Ultra-low latency continuous block-parallel stream windowing using FPGA on-chip memory.

Justin S. J. Wong, Runbin Shi, Maolin Wang, Hayden Kwok-Hay So

Proceedings of the International Conference on Field Programmable Technology, 2017

2016

A Heterogeneous System for Real-Time Detection with AdaBoost.

Zheng Xu, Runbin Shi, Zhihao Sun, Yaqi Li, Yuanjia Zhao, Chenjian Wu

Proceedings of the 18th IEEE International Conference on High Performance Computing and Communications; 14th IEEE International Conference on Smart City; 2nd IEEE International Conference on Data Science and Systems, 2016

The neuro vector engine: Flexibility to improve convolutional net efficiency for wearable vision.

Maurice Peemen, Runbin Shi, Sohan Lal, Ben H. H. Juurlink, Bart Mesman, Henk Corporaal

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015

A Locality Aware Convolutional Neural Networks Accelerator.

Runbin Shi, Zheng Xu, Zhihao Sun, Maurice Peemen, Ang Li, Henk Corporaal, Di Wu

Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

A programmable baseband processor for massive MIMO uplink multi-user detection.

Xiaoying Qiu, Leilei Miao, Runbin Shi, Zhiwei Wang, Liang Liu, Di Wu

Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015