John J. Lee

Orcid: 0000-0002-5335-9071

Affiliations:
  • Indiana University-Purdue University Indianapolis, Department of Electrical and Computer Engineering, IN, USA
  • Georgia Institute of Technology, Washington, DC, USA (PhD 2003/2004)


According to our database1, John J. Lee authored at least 50 papers between 2001 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Bibliography

2023
Machine-Learning-Enhanced Blockchain Consensus With Transaction Prioritization for Smart Cities.
IEEE Internet Things J., 2023

SRAM Vmin Scaling via Negative Wordline.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

Towards No Penalty Control Hazard Handling.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

Data Acquisition Platform for The Energy Management of Smart Factories and Buildings.
Proceedings of the 17th International Conference on Ubiquitous Information Management and Communication, 2023

No Programming, Configurable Z-Wave Node with Multi-Sensor-Protocol Support.
Proceedings of the 17th International Conference on Ubiquitous Information Management and Communication, 2023

2022
Public Participation Consortium Blockchain for Smart City Governance.
IEEE Internet Things J., 2022

2021
Implementation of High Speed and Low Power Carry Select Adder with BEC.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

INDF: Efficient Transaction Publishing in Blockchain.
Proceedings of the ICC 2021, 2021

2020
Emergency Evacuation Assistance.
Proceedings of the 14th International Conference on Ubiquitous Information Management and Communication, 2020

2017
A GPU-oriented online recommendation algorithm for efficient processing of time-varying continuous data streams.
Knowl. Inf. Syst., 2017

2016
Symbiote Coprocessor Unit - A Streaming Coprocessor for Data Stream Acceleration.
IEEE Trans. Very Large Scale Integr. Syst., 2016

GPU-LMDDA: a bit-vector GPU-based deadlock detection algorithm for multi-unit resource systems.
Int. J. Parallel Emergent Distributed Syst., 2016

GPU-OSDDA: a bit-vector GPU-based deadlock detection algorithm for single-unit resource systems.
Int. J. Parallel Emergent Distributed Syst., 2016

GPU-Accelerated Outlier Detection for Continuous Data Streams.
Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium, 2016

GStreamMiner: A GPU-accelerated Data Stream Mining Framework.
Proceedings of the 25th ACM International Conference on Information and Knowledge Management, 2016

2015
Matrix-Based XML Stream Processing Using a GPU.
Proceedings of the 2015 IEEE International Congress on Big Data, New York City, NY, USA, June 27, 2015

2014
Context Generator and Behavior Translator in a Multilayer Architecture for a Modular Development Process of Cyber-Physical Robot Systems.
IEEE Trans. Ind. Electron., 2014

Online multi-dimensional regression analysis on concept-drifting data streams.
Int. J. Data Min. Model. Manag., 2014

Adaptive-optics optical coherence tomography processing using a graphics processing unit.
Proceedings of the 36th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2014

2013
Hyper-structure mining of frequent patterns in uncertain data streams.
Knowl. Inf. Syst., 2013

GPU accelerated item-based collaborative filtering for big-data applications.
Proceedings of the 2013 IEEE International Conference on Big Data (IEEE BigData 2013), 2013

2012
Instant Multiunit Resource Hardware Deadlock Detection Scheme for System-on-Chips.
ACM Trans. Embed. Comput. Syst., 2012

Particle Swarm Optimization on a GPU.
Proceedings of the 2012 IEEE International Conference on Electro/Information Technology, 2012

Multi-biomarker panel selection on a GPU.
Proceedings of the 2012 IEEE International Conference on Electro/Information Technology, 2012

2011
A Novel Multicontext Coarse-Grained Reconfigurable Architecture (CGRA) For Accelerating Column-Oriented Databases.
ACM Trans. Reconfigurable Technol. Syst., 2011

A parallel multi-unit resource deadlock detection algorithm with O(log<sub>2</sub>/min(m, n))) overall run-time complexity.
J. Parallel Distributed Comput., 2011

StreamFitter: A Real Time Linear Regression Analysis System for Continuous Data Streams.
Proceedings of the Database Systems for Advanced Applications, 2011

2010
A True O(1) Parallel Deadlock Detection Algorithm for Single-Unit Resource Systems and Its Hardware Implementation.
IEEE Trans. Parallel Distributed Syst., 2010

Multiprocessor simulation using communicating sequential processes.
Int. J. Comput. Aided Eng. Technol., 2010

Symbiote: a reconfigurable logic assisted data streammanagement system (RLADSMS).
Proceedings of the ACM SIGMOD International Conference on Management of Data, 2010

A General Purpose FPGA Data Filter for Data Stream Processing.
Proceedings of the 2010 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2010

An O(n) Parallel Shortest Path Algorithm and Its Hardware Implementation.
Proceedings of the 2010 International Conference on Computer Design, 2010

2009
An XML-Based ADL Framework for Automatic Generation of Multithreaded Computer Architecture Simulators.
IEEE Comput. Archit. Lett., 2009

A Novel Multicontext Coarse-Grained Join Accelerator for Column-Oriented Databases.
Proceedings of the 2009 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2009

2008
A Novel O(1) Deadlock Detection Methodology for Multiunit Resource Systems and Its Hardware Implementation for System-on-Chip.
IEEE Trans. Parallel Distributed Syst., 2008

A Parallel Deadlock Detection Algorithm with O(1) Overall Run-time Complexity.
IEEE Comput. Archit. Lett., 2008

Main Memory DBMS on Modern Processors, a Scalable Approach for Database Performance Characterization Using Simulation.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2008

Multiprocessor Simulation Using Communicating Sequential Processes.
Proceedings of the 2008 International Conference on Modeling, 2008

Characterization of TPC-H queries for a column-oriented database on a dual-core amd athlon processor.
Proceedings of the 17th ACM Conference on Information and Knowledge Management, 2008

R-tree: A Hardware Implementation.
Proceedings of the 2008 International Conference on Computer Design, 2008

2007
A Novel Parallel Deadlock Detection Algorithm and Hardware for Multiprocessor System-on-a-Chip.
IEEE Comput. Archit. Lett., 2007

Simulation of hybrid computer architectures: simulators, methodologies and recommendations.
Proceedings of the IFIP VLSI-SoC 2007, 2007

A novel O(1) parallel deadlock detection algorithm and architecture for multi-unit resource systems.
Proceedings of the 25th International Conference on Computer Design, 2007

Design Space Exploration of Multiprocessor Systems with MultiContext Reconfigurable Co-Processors.
Proceedings of the 2007 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2007

2006
A Novel {O(n)} Parallel Banker's Algorithm for System-on-a-Chip.
IEEE Trans. Parallel Distributed Syst., 2006

2005
An <i>o</i>(<i>min</i>(<i>m</i>, <i>n</i>)) parallel deadlock detection algorithm.
ACM Trans. Design Autom. Electr. Syst., 2005

2004
Hardware/Software Deadlock Avoidance for Multiprocessor Multiresource System-on-a-Chip.
PhD thesis, 2004

A novel deadlock avoidance algorithm and its hardware implementation.
Proceedings of the 2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2004

2003
A comparison of the RTU hardware RTOS with a hardware/software RTOS.
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

2001
A system-on-a-chip lock cache with task preemption support.
Proceedings of the 2001 International Conference on Compilers, 2001


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