Jong-Jiann Shieh

According to our database, Jong-Jiann Shieh authored at least 8 papers between 1989 and 2010.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2010

Power Improvement Using Block-Based Loop Buffer with Innermost Loop Control.

Ming-Yuan Zhong, Jong-Jiann Shieh

Proceedings of the Algorithms and Architectures for Parallel Processing, 2010

2005

Speculative Issue Logic.

You-Jan Tsai, Jong-Jiann Shieh

Proceedings of the Advances in Computer Systems Architecture, 10th Asia-Pacific Conference, 2005

2004

Dynamic Fetch Engine for Simultaneous Multithreaded Processors.

Tzung-Rei Yang, Jong-Jiann Shieh

Proceedings of the Advances in Computer Systems Architecture, 9th Asia-Pacific Conference, 2004

2003

An Issue Logic for Superscalar Microprocessors.

Feng-Jiann Shiao, Jong-Jiann Shieh

Proceedings of the 16th International Conference on Computer Applications in Industry and Engineering, 2003

2002

Block Based Fetch Engine for Superscalar Processors.

Zheng-Kuo Wu, Jong-Jiann Shieh

Proceedings of the 15th International Conference on Computer Applications in Industry and Engineering, 2002

2001

A Multiple Blocks Fetch Engine for High Performance Superscalar Processors.

Yung-Chung Wu, Jong-Jiann Shieh

Proceedings of the ISCA 14th International Conference on Parallel and Distributed Computing Systems, 2001

1990

An instruction reoderer for pipelined computers.

Jong-Jiann Shieh, Christos A. Papachristou

Proceedings of the 23rd Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1990

1989

On reordering instruction streams for pipelined computers.

Jong-Jiann Shieh, Christos A. Papachristou

Proceedings of the 22nd Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1989