Joonhwan Yi

According to our database1, Joonhwan Yi authored at least 13 papers between 2001 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2018
An interpolation method for strong barrel lens distortion.
Vis. Comput., 2018

2016
Modeling and performance analysis for a receiver-initiated MAC protocol in wireless sensor networks.
Int. J. Distributed Sens. Networks, 2016

Register grouping for synthesis of clock gating logic.
Proceedings of the International Conference on IC Design and Technology, 2016

2015
A Receiver-Initiated MAC Protocol for Wireless Sensor Networks Based on Tree Topology.
Int. J. Distributed Sens. Networks, 2015

Power modeling for digital circuits with clock gating.
IEICE Electron. Express, 2015

2012
Robust Coupling Delay Test Sets.
J. Electron. Test., 2012

2011
A data flow optimization method for high speed MAC processing in an IEEE 802.16m modem.
IEICE Electron. Express, 2011

2007
Industrial experience with cycle error computation of cycle-accurate transaction level models.
Proceedings of the 2007 IEEE International SOC Conference, 2007

2006
High-level delay test generation for modular circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

Cycle error correction in asynchronous clock modeling for cycle-based simulation.
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

2005
The Coupling Model for Function and Delay Faults.
J. Electron. Test., 2005

2002
High -level function and delay testing for digital circuits.
PhD thesis, 2002

2001
A fault model for function and delay testing.
Proceedings of the 6th European Test Workshop, 2001


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