José-Alejandro López Alcantud

According to our database, José-Alejandro López Alcantud authored at least 8 papers between 2000 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2020

All-hardware SIFT implementation for real-time VGA images feature extraction.

Ginés Doménech-Asensi, Juan Zapata-Pérez, Ramón Ruiz Merino, José-Alejandro López Alcantud, José Ángel Díaz-Madrid, Víctor Manuel Brea Sánchez, Paula López

J. Real Time Image Process., 2020

2018

An all-hardware implementation of the subpixel refinement stage in SIFT algorithm.

Pablo Rubio-Ibáñez, Ramón Ruiz Merino, Ginés Doménech-Asensi, J. Javier Martínez-Álvarez, Juan Zapata-Pérez, José Ángel Díaz-Madrid, José-Alejandro López Alcantud

Int. J. Circuit Theory Appl., 2018

2017

An 11-bit 20-MSample/s pipelined ADC with OTA bias current regulation to optimize power dissipation.

José Ángel Díaz-Madrid, Ginés Doménech-Asensi, José-Alejandro López Alcantud, M. Oberst

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2012

A fourth order CMOS band pass filter for PIR sensors.

Ginés Doménech-Asensi, F. Martinez-Viviente, J. Illade-Quinteiro, Juan Zapata-Pérez, Ramón Ruiz Merino, José-Alejandro López Alcantud, Juan Martínez-Alajarín, Francisco J. Fernández-Luque, Juan M. Carrillo, Miguel Angel Domínguez

Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

2006

Synthesis on FPAA of a Smart Sthetoscope Analog Subsystem.

Ginés Doménech-Asensi, Juan Martínez-Alajarín, Ramón Ruiz Merino, José-Alejandro López Alcantud

Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

2005

Description and Simulation of Bio-inspired Systems Using VHDL-AMS.

Ginés Doménech-Asensi, José-Alejandro López Alcantud, Ramón Ruiz Merino

Proceedings of the Artificial Intelligence and Knowledge Engineering Applications: A Bioinspired Approach: First International Work-Conference on the Interplay Between Natural and Artificial Computation, 2005

2003

An Analogue Current-Mode Hardware Design Proposal for Preprocessing Layers in ART-Based Neural Networks.

José-Alejandro López Alcantud, José Ángel Díaz-Madrid, Hans Hauer, Ramón Ruiz Merino

Proceedings of the Artificial Neural Nets Problem Solving Methods, 2003

2000

VHDL-AMS modeling of self-organizing neural systems.

José-Alejandro López Alcantud, Tom Kazmierski

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000