Joshua Peraza

According to our database1, Joshua Peraza authored at least 11 papers between 2011 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2016
PMaC's green queue: a framework for selecting energy optimal DVFS configurations in large scale MPI applications.
Concurr. Comput. Pract. Exp., 2016

2015
PEBIL: binary instrumentation for practical data-intensive program analysis.
Clust. Comput., 2015

Performance and energy efficiency analysis of 64-bit ARM using GAMESS.
Proceedings of the 2nd International Workshop on Hardware-Software Co-Design for High Performance Computing, 2015

Compute bottlenecks on the new 64-bit ARM.
Proceedings of the 3rd International Workshop on Energy Efficient Supercomputing, 2015

VecMeter: Measuring Vectorization on the Xeon Phi.
Proceedings of the 2015 IEEE International Conference on Cluster Computing, 2015

2014
Characterizing the Performance-Energy Tradeoff of Small ARM Cores in HPC Computation.
Proceedings of the Euro-Par 2014 Parallel Processing, 2014

2013
Understanding the performance of stencil computations on Intel's Xeon Phi.
Proceedings of the 2013 IEEE International Conference on Cluster Computing, 2013

2012
Efficient HPC Data Motion via Scratchpad Memory.
Proceedings of the 2012 SC Companion: High Performance Computing, 2012

A Static Binary Instrumentation Threading Model for Fast Memory Trace Collection.
Proceedings of the 2012 SC Companion: High Performance Computing, 2012

Green Queue: Customized Large-Scale Clock Frequency Scaling.
Proceedings of the 2012 Second International Conference on Cloud and Green Computing, 2012

2011
An idiom-finding tool for increasing productivity of accelerators.
Proceedings of the 25th International Conference on Supercomputing, 2011, Tucson, AZ, USA, May 31, 2011


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