Jotham Vaddaboina Manoranjan

According to our database, Jotham Vaddaboina Manoranjan authored at least 4 papers between 2014 and 2016.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2016

Design of a multi-style and multi-frequency FPGA.

Jotham Vaddaboina Manoranjan, Solomon Surya Tej Mano Sajjan, Vivek B. Gujari, Kenneth S. Stevens

Proceedings of the 2016 IFIP/IEEE International Conference on Very Large Scale Integration, 2016

Reconfigurable circuit for implementation of family of 4-phase latch protocols.

Jotham Vaddaboina Manoranjan, Kenneth S. Stevens

Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

Qualifying Relative Timing Constraints for Asynchronous Circuits.

Jotham Vaddaboina Manoranjan, Kenneth S. Stevens

Proceedings of the 22nd IEEE International Symposium on Asynchronous Circuits and Systems, 2016

2014

An a-FPGA architecture for relative timing based asynchronous designs.

Jotham Vaddaboina Manoranjan, Kenneth S. Stevens

Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014