Juan P. Oliver

According to our database, Juan P. Oliver authored at least 14 papers between 2005 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

Time-Power-Energy Balance of blas Kernels in Modern fpgas.

Federico Favaro, Ernesto Dufrechou, Juan P. Oliver, Pablo Ezzatti

Proceedings of the High Performance Computing - 9th Latin American Conference, 2022

2021

Energy-efficient algebra kernels in FPGA for High Performance Computing.

Federico Favaro, Ernesto Dufrechou, Pablo Ezzatti, Juan P. Oliver

J. Comput. Sci. Technol., 2021

Unleashing the computational power of FPGAs to efficiently perform SPMV operation.

Federico Favaro, Juan P. Oliver, Pablo Ezzatti

Proceedings of the 40th International Conference of the Chilean Computer Science Society, 2021

2020

Understanding the Performance of Elementary NLA Kernels in FPGAs.

Federico Favaro, Juan P. Oliver, Ernesto Dufrechou, Pablo Ezzatti

Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium Workshops, 2020

Exploring fpga Optimizations to Compute Sparse Numerical Linear Algebra Kernels.

Federico Favaro, Ernesto Dufrechou, Pablo Ezzatti, Juan P. Oliver

Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2020

2019

A Framework to Compare Estimated and Measured Power Consumption on FPGAs.

Juan P. Oliver, Federico Favaro, Eduardo I. Boemo

J. Low Power Electron., 2019

2018

Wireless EEG System Achieving High Throughput and Reduced Energy Consumption Through Lossless and Near-Lossless Compression.

Guillermo Dufort, Federico Favaro, Federico Lecumberry, Alvaro Martín, Juan P. Oliver, Julian Oreggioni, Ignacio Ramírez, Gadiel Seroussi, Leonardo Steinfeld

IEEE Trans. Biomed. Circuits Syst., 2018

A 64-channel wireless EEG recording system for wearable applications.

Martin Causa, Franco La Paz, Santiago Radi, Juan P. Oliver, Leonardo Steinfeld, Julian Oreggioni

Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018

2017

A Low Cost System for Self Measurements of Power Consumption in Field Programmable Gate Arrays.

Juan P. Oliver, Francisco Veirano, Diego A. Bouvier, Eduardo I. Boemo

J. Low Power Electron., 2017

2016

Wearable EEG via lossless compression.

Guillermo Dufort, Federico Favaro, Federico Lecumberry, Alvaro Martín, Juan P. Oliver, Julian Oreggioni, Ignacio Ramírez, Gadiel Seroussi, Leonardo Steinfeld

Proceedings of the 38th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2016

2013

Self-Reconfigurable Constant Multiplier for FPGA.

Javier Hormigo, Gabriel Caffarena, Juan P. Oliver, Eduardo I. Boemo

ACM Trans. Reconfigurable Technol. Syst., 2013

Tracking the pipelining-power rule along the FPGA technical literature.

Eduardo I. Boemo, Juan P. Oliver, Gabriel Caffarena

Proceedings of the 10th FPGAworld Conference, 2013

2009

Lab at Home: Hardware Kits for a Digital Design Lab.

Juan P. Oliver, Fiorella Haim

IEEE Trans. Educ., 2009

2005

Hardware Lab at Home Possible with Ultra Low Cost Boards.

Juan P. Oliver, Fiorella Haim, Sebastian Fernandez, Javier Rodriguez, Pablo Rolando

Proceedings of the 2005 International Conference on Microelectronics Systems Education, 2005