Jules Kouamo

Orcid: 0009-0008-1075-5577

According to our database¹, Jules Kouamo authored at least 3 papers between 2025 and 2026.

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2026

IABIST: An IJTAG-Compliant Machine Learning-Based Analog BIST Framework for SoC Verification.

[DOI]

Proceedings of the 44th IEEE VLSI Test Symposium, 2026

2025

Machine Learning-Based Parametric Fault Detection in Analog and Mixed-Signal Circuits.

[DOI]

Proceedings of the 31st IEEE International Symposium on On-Line Testing and Robust System Design, 2025

Enhanced BIST Architecture for Analog and Mixed-Signal Systems with On-Chip APRMLS and Machine Learning Analysis.

[DOI]

Proceedings of the International Conference on Control, Automation and Diagnosis, 2025