Michele Portolan

According to our database, Michele Portolan authored at least 43 papers between 2004 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2023

Self-Test Library Generation for In-Field Test of Path Delay Faults.

Lorena Anghel, Riccardo Cantoro, Riccardo Masante, Michele Portolan, Sandro Sartoni, Matteo Sonza Reorda

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2023

Refreshing the JTAG Family.

Michele Portolan, Martin Keim, Jeff Rearick, Heiko Ehrenberg

Proceedings of the 41st IEEE VLSI Test Symposium, 2023

Evaluating the Impact of Aging on Path-Delay Self-Test Libraries.

Riccardo Cantoro, Sandro Sartoni, Matteo Sonza Reorda, Lorena Anghel, Michele Portolan

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2023

2022

Flexible and Portable Management of Secure Scan Implementations Exploiting P1687.1 Extensions.

Michele Portolan, Emanuele Valea, Paolo Maistri, Giorgio Di Natale

IEEE Des. Test, 2022

Circuit-to-Circuit Attacks in SoCs via Trojan-Infected IEEE 1687 Test Infrastructure.

Michele Portolan, Antonios Pavlidis, Giorgio Di Natale, Eric Faehn, Haralampos-G. Stratigopoulos

Proceedings of the IEEE International Test Conference, 2022

IEEE P1687.1: Extending the Network Boundaries for Test.

Michael Laisne, Alfred L. Crouch, Michele Portolan, Martin Keim, Hans Martin von Staudt, Bradford G. Van Treuren, Jeff Rearick, Songlin Zuo

Proceedings of the IEEE International Test Conference, 2022

2021

Secure Test with RSNs: Seamless Authenticated Extended Confidentiality.

Paolo Maistri, Vincent Reynaud, Michele Portolan, Régis Leveugle

Proceedings of the 19th IEEE International New Circuits and Systems Conference, 2021

Security EDA Extension through P1687.1 and 1687 Callbacks.

Michele Portolan, Vincent Reynaud, Paolo Maistri, Régis Leveugle, Giorgio Di Natale

Proceedings of the IEEE International Test Conference, 2021

Exploring and Comparing IEEE P1687.1 and IEEE 1687 Modeling of Non-TAP Interfaces.

Hans Martin von Staudt, Bradford G. Van Treuren, Jeff Rearick, Michele Portolan, Martin Keim

Proceedings of the 26th IEEE European Test Symposium, 2021

2020

Automated Testing Flow: The Present and the Future.

Michele Portolan

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Modeling Novel Non-JTAG IEEE 1687-Like Architectures.

Mike Laisne, Alfred L. Crouch, Michele Portolan, Martin Keim, Hans Martin von Staudt, M. Abdalwahab, Bradford G. Van Treuren, Jeff Rearick

Proceedings of the IEEE International Test Conference, 2020

New Perspectives on Core In-field Path Delay Test.

Riccardo Cantoro, Dario Foti, Sandro Sartoni, Matteo Sonza Reorda, Lorena Anghel, Michele Portolan

Proceedings of the IEEE International Test Conference, 2020

A Comprehensive End-to-end Solution for a Secure and Dynamic Mixed-signal 1687 System.

Michele Portolan, R. Silveira Feitoza, Ghislain Takam Tchendjou, Vincent Reynaud, Kalpana Senthamarai Kannan, Manuel J. Barragán, Emmanuel Simeu, Paolo Maistri, Lorena Anghel, Régis Leveugle, Salvador Mir

Proceedings of the 26th IEEE International Symposium on On-Line Testing and Robust System Design, 2020

Dynamic Authentication-Based Secure Access to Test Infrastructure.

Michele Portolan, Vincent Reynaud, Paolo Maistri, Régis Leveugle

Proceedings of the IEEE European Test Symposium, 2020

Linking Chip, Board, and System Test via Standards.

Michele Portolan, Jeff Rearick, Martin Keim

Proceedings of the IEEE European Test Symposium, 2020

2019

Simulation-based Equivalence Checking between IEEE 1687 ICL and RTL.

Aleksa Damljanovic, Artur Jutman, Michele Portolan, Ernesto Sánchez, Giovanni Squillero, Anton Tsertov

Proceedings of the IEEE International Test Conference, 2019

Approximate computing design exploration through data lifetime metrics.

Alessandro Savino, Michele Portolan, Régis Leveugle, Stefano Di Carlo

Proceedings of the 24th IEEE European Test Symposium, 2019

Alternatives to Fault Injections for Early Safety/Security Evaluations.

Michele Portolan, Alessandro Savino, Régis Leveugle, Stefano Di Carlo, Alberto Bosio, Giorgio Di Natale

Proceedings of the 24th IEEE European Test Symposium, 2019

A Functional Approach to Test and Debug of IEEE 1687 Reconfigurable Networks.

Michele Portolan, Riccardo Cantoro, Ernesto Sánchez

Proceedings of the 24th IEEE European Test Symposium, 2019

2017

Reliability of computing systems: From flip flops to variables.

Giorgio Di Natale, Maha Kooli, Alberto Bosio, Michele Portolan, Régis Leveugle

Proceedings of the 23rd IEEE International Symposium on On-Line Testing and Robust System Design, 2017

Mixed-signal BIST computation offloading using IEEE 1687.

Michele Portolan, Manuel J. Barragán, Rshdee Alhakim, Salvador Mir

Proceedings of the 22nd IEEE European Test Symposium, 2017

2016

Accessing 1687 systems using arbitrary protocols.

Michele Portolan

Proceedings of the 2016 IEEE International Test Conference, 2016

Evaluating application-aware soft error effects in digital circuits without fault injections or probabilistic computations.

K. Chibani, Michele Portolan, Régis Leveugle

Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016

Student-driven development of a digital tester.

Michele Portolan, Robin Rolland

Proceedings of the 11th European Workshop on Microelectronics Education, 2016

A novel test generation and application flow for functional access to IEEE 1687 instruments.

Michele Portolan

Proceedings of the 21th IEEE European Test Symposium, 2016

2015

Special session 8C: E.J. McCluskey doctoral thesis award semi-final.

Michele Portolan, K. Huang

Proceedings of the 33rd IEEE VLSI Test Symposium, 2015

2014

Special session 8A: E.J. McCluskey Doctoral Thesis Award semi-final.

Michele Portolan, Michail Maniatakos

Proceedings of the 32nd IEEE VLSI Test Symposium, 2014

Fast accurate evaluation of register lifetime and criticality in a pipelined microprocessor.

K. Chibani, Mohamed Ben Jrad, Michele Portolan, Régis Leveugle

Proceedings of the 22nd International Conference on Very Large Scale Integration, 2014

Criticality evaluation of embedded software running on a pipelined microprocessor and impact of compilation options.

K. Chibani, Salma Bergaoui, Michele Portolan, Régis Leveugle

Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

2013

Executing IJTAG: Are Vectors Enough?

Michele Portolan, Bradford G. Van Treuren, Suresh Goyal

IEEE Des. Test, 2013

Automatic equivalent model generation and evolution for small cell networks.

Davide Cherubini, Michele Portolan

Proceedings of the 11th International Symposium and Workshops on Modeling and Optimization in Mobile, 2013

Special session 3B: E.J. McCluskey Doctoral Thesis Award semi-final - Posters.

Michele Portolan, Michail Maniatakos

Proceedings of the 31st IEEE VLSI Test Symposium, 2013

Special session 8A: E.J. McCluskey doctoral thesis award semi-final - presentations.

Michele Portolan, Michail Maniatakos

Proceedings of the 31st IEEE VLSI Test Symposium, 2013

2012

Packet-based JTAG for remote testing.

Michele Portolan

Proceedings of the 2012 IEEE International Test Conference, 2012

2010

A Common Language Framework for Next-Generation Embedded Testing.

Michele Portolan, Suresh Goyal, Bradford G. Van Treuren, Chen-Huan Chiang, Tapan J. Chakraborty, Thomas B. Cook

IEEE Des. Test Comput., 2010

Scan chain securization though Open-Circuit Deadlocks.

Michele Portolan, Bradford G. Van Treuren, Suresh Goyal

Proceedings of the 2011 IEEE International Test Conference, 2010

2009

Scalable and efficient integrated test architecture.

Michele Portolan, Suresh Goyal, Bradford G. Van Treuren

Proceedings of the 2009 IEEE International Test Conference, 2009

2008

A New Language Approach for IJTAG.

Michele Portolan, Suresh Goyal, Bradford G. Van Treuren, Chen-Huan Chiang, Tapan J. Chakraborty, Thomas B. Cook

Proceedings of the 2008 IEEE International Test Conference, 2008

Usefulness and effectiveness of HW and SW protection mechanisms in a processor-based system.

Pierre Vanhauwaert, Michele Portolan, Régis Leveugle, Philippe Roche

Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

2007

Effective Checkpoint and Rollback Using Hardware/OS Collaboration.

Michele Portolan, Régis Leveugle

Proceedings of the 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 2007

2005

On the Need for Common Evaluation Methods for Fault Tolerance Costs in Microprocessors.

Michele Portolan, Régis Leveugle

Proceedings of the 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 2005

Towards a Secure and Reliable System.

Michele Portolan, Régis Leveugle

Proceedings of the Embedded and Ubiquitous Computing, 2005

2004

Operating System Function Reuse to Achieve Low-Cost Fault Tolerance.

Michele Portolan, Régis Leveugle

Proceedings of the 10th IEEE International On-Line Testing Symposium (IOLTS 2004), 2004