Junpei Inoue

According to our database, Junpei Inoue authored at least 7 papers between 2004 and 2005.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2005

Evaluation of X Architecture Using Interconnect Length Distribution.

Hidenari Nakashima, Naohiro Takagi, Junpei Inoue, Kenichi Okada, Kazuya Masu

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005

Circuit Performance Prediction Considering Core Utilization with Interconnect Length Distribution Model.

Hidenari Nakashima, Junpei Inoue, Kenichi Okada, Kazuya Masu

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005

Wire Length Distribution Model for System LSI.

Takanori Kyogoku, Junpei Inoue, Hidenari Nakashima, Takumi Uezono, Kenichi Okada, Kazuya Masu

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005

Prediction of delay time for future LSI using on-chip transmission line interconnects.

Takumi Uezono, Junpei Inoue, Takanori Kyogoku, Kenichi Okada, Kazuya Masu

Proceedings of the Seventh International Workshop on System-Level Interconnect Prediction (SLIP 2005), 2005

Wire Length Distribution Model Considering Core Utilization for System on Chip.

Takanori Kyogoku, Junpei Inoue, Hidenari Nakashima, Takumi Uezono, Kenichi Okada, Kazuya Masu

Proceedings of the 2005 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2005), 2005

Evaluation of on-chip transmission line interconnect using wire length distribution.

Junpei Inoue, Hiroyuki Ito, Shinichiro Gomi, Takanori Kyogoku, Takumi Uezono, Kenichi Okada, Kazuya Masu

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004

ULSI Interconnect Length Distribution Model Considering Core Utilization.

Hidenari Nakashima, Junpei Inoue, Kenichi Okada, Kazuya Masu

Proceedings of the 2004 Design, 2004