Junung Choi

Orcid: 0009-0005-1663-0140

According to our database1, Junung Choi authored at least 5 papers between 2022 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
A Self-Supervised Learning of a Foundation Model for Analog Layout Design Automation.
IEEE Trans. Circuits Syst. I Regul. Pap., February, 2026

2025
An On-Chip Low-Cost Averaging Digital Sampling Scope for 80-GS/s Measurement of Wireline Pulse Responses.
IEEE Trans. Very Large Scale Integr. Syst., May, 2025

2024
Compact Single-Ended Transceivers Demonstrating Flexible Generation of 1/N-Rate Receiver Front-Ends for Short-Reach Links.
IEEE Trans. Circuits Syst. I Regul. Pap., January, 2024

A Layout-to-Generator Conversion Framework With Graphical User Interface for Visual Programming of Analog Layout Generators.
IEEE Access, 2024

2022
A Layout Generator of Latch, Flip-Flop, and Shift Register for High-Speed Links.
Proceedings of the 19th International SoC Design Conference, 2022


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