Junzhong Shen

According to our database, Junzhong Shen authored at least 22 papers between 2015 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

TILE-SIM: A Systematic Approach to Systolic Array-based Accelerator Evaluation.

Yuhang Li, Mei Wen, Jiawei Fei, Junzhong Shen, Yasong Cao

Proceedings of the International IEEE Symposium on Performance Analysis of Systems and Software, 2022

S-SIM: A Simulator for Systolic Array-based DNN Accelerators with Tile Access Awareness.

Yuhang Li, Mei Wen, Renyu Yang, Junzhong Shen, Yasong Cao, Jianan Wang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Mentha: Enabling Sparse-Packing Computation on Systolic Arrays.

Minjin Tang, Mei Wen, Yasong Cao, Junzhong Shen, Jianchao Yang, Jiawei Fei, Yang Guo, Sheng Liu

Proceedings of the 51st International Conference on Parallel Processing, 2022

BP-Im2col: Implicit Im2col Supporting AI Backpropagation on Systolic Arrays.

Jianchao Yang, Mei Wen, Junzhong Shen, Yasong Cao, Minjin Tang, Renyu Yang, Jiawei Fei, Chunyuan Zhang

Proceedings of the IEEE 40th International Conference on Computer Design, 2022

MZ Core: An Enhanced Matrix Acceleration Engine for HPC/ AI Applications.

Yasong Cao, Mei Wen, Junzhong Shen, Sheng Liu, Zhi Wang, Minjin Tang, Yahao Fang, Jianchao Yang, Renyu Yang, Yuhan Kang, Jiawei Fei

Proceedings of the 24th IEEE Int Conf on High Performance Computing & Communications; 8th Int Conf on Data Science & Systems; 20th Int Conf on Smart City; 8th Int Conf on Dependability in Sensor, 2022

2021

SAI: Self-Adjusting Incremental Quantile Estimation for Sparse Training of Neural Networks on Hardware Accelerators.

Jianchao Yang, Mei Wen, Minjin Tang, Junzhong Shen, Chunyuan Zhang

Proceedings of the 2021 IEEE 23rd Int Conf on High Performance Computing & Communications; 7th Int Conf on Data Science & Systems; 19th Int Conf on Smart City; 7th Int Conf on Dependability in Sensor, 2021

Embrace the Conflicts: Exploring the Integration of Single Port Memory in Systolic Array-based Accelerators.

Renyu Yang, Junzhong Shen, Mei Wen, Yasong Cao, Yuhang Li

Proceedings of the 2021 IEEE 23rd Int Conf on High Performance Computing & Communications; 7th Int Conf on Data Science & Systems; 19th Int Conf on Smart City; 7th Int Conf on Dependability in Sensor, 2021

2020

Toward an Efficient Deep Pipelined Template-Based Architecture for Accelerating the Entire 2-D and 3-D CNNs on FPGA.

Junzhong Shen, You Huang, Mei Wen, Chunyuan Zhang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

P4 to FPGA-A Fast Approach for Generating Efficient Network Processors.

Zhuang Cao, Huayou Su, Qianming Yang, Junzhong Shen, Mei Wen, Chunyuan Zhang

IEEE Access, 2020

Towards a Deep-Pipelined Architecture for Accelerating Deep GCN on a Multi-FPGA Platform.

Qixuan Cheng, Mei Wen, Junzhong Shen, Deguang Wang, Chunyuan Zhang

Proceedings of the Algorithms and Architectures for Parallel Processing, 2020

Scalable FPGA-based Architecture for High-Performance Per-Flow Traffic Measurement.

Junzhong Shen, Mei Wen, Minjin Tang, Xiaolei Zhao, Chunyuan Zhang

Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

Towards Memory-Efficient Streaming Processing with Counter-Cascading Sketching on FPGA.

Minjin Tang, Mei Wen, Junzhong Shen, Xiaolei Zhao, Chunyuan Zhang

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019

Towards a Uniform Architecture for the Efficient Implementation of 2D and 3D Deconvolutional Neural Networks on FPGAs.

Deguang Wang, Junzhong Shen, Mei Wen, Chunyuan Zhang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

An Efficient Design Flow for Accelerating Complicated-connected CNNs on a Multi-FPGA Platform.

Deguang Wang, Junzhong Shen, Mei Wen, Chunyuan Zhang

Proceedings of the 48th International Conference on Parallel Processing, 2019

Accelerating 3D CNN-based Lung Nodule Segmentation on a Multi-FPGA System.

Junzhong Shen, Deguang Wang, You Huang, Mei Wen, Chunyuan Zhang

Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

Scale-out Acceleration for 3D CNN-based Lung Nodule Segmentation on a Multi-FPGA System.

Junzhong Shen, Deguang Wang, You Huang, Mei Wen, Chunyuan Zhang

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018

MALMM: A multi-array architecture for large-scale matrix multiplication on FPGA.

You Huang, Junzhong Shen, Yuran Qiao, Mei Wen, Chunyuan Zhang

IEICE Electron. Express, 2018

Towards a Multi-array Architecture for Accelerating Large-scale Matrix Multiplication on FPGAs.

Junzhong Shen, Yuran Qiao, You Huang, Mei Wen, Chunyuan Zhang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Towards a Uniform Template-based Architecture for Accelerating 2D and 3D CNNs on FPGA.

Junzhong Shen, You Huang, Zelong Wang, Yuran Qiao, Mei Wen, Chunyuan Zhang

Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

2017

FPGA-accelerated deep convolutional neural networks for high throughput and energy efficiency.

Yuran Qiao, Junzhong Shen, Tao Xiao, Qianming Yang, Mei Wen, Chunyuan Zhang

Concurr. Comput. Pract. Exp., 2017

Optimizing OpenCL Implementation of Deep Convolutional Neural Network on FPGA.

Yuran Qiao, Junzhong Shen, Dafei Huang, Qianming Yang, Mei Wen, Chunyuan Zhang

Proceedings of the Network and Parallel Computing, 2017

2015

Unified Virtual Memory Support for Deep CNN Accelerator on SoC FPGA.

Tao Xiao, Yuran Qiao, Junzhong Shen, Qianming Yang, Mei Wen

Proceedings of the Algorithms and Architectures for Parallel Processing, 2015