Jussi Roivainen

According to our database, Jussi Roivainen authored at least 18 papers between 2001 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Realizing multioperations and multiprefixes in Thick Control Flow processors.

Martti Forsell, Jussi Roivainen, Ville Leppänen, Jesper Larsson Träff

Microprocess. Microsystems, April, 2023

Preliminary Performance and Memory Access Scalability Study of Thick Control Flow Processors.

Martti Forsell, Jussi Roivainen, Ville Leppänen, Jesper Larsson Träff

Proceedings of the IEEE Nordic Circuits and Systems Conference, 2023

2022

Performance and programmability comparison of the thick control flow architecture and current multicore processors.

Martti Forsell, Sara Nikula, Jussi Roivainen, Ville Leppänen, Jesper Larsson Träff

J. Supercomput., 2022

2020

Optimizing Memory Access in TCF Processors with Compute-Update Operations.

Martti Forsell, Jussi Roivainen, Jesper Larsson Träff

Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium Workshops, 2020

2019

5G Radar: Scenarios, Numerology and Simulations.

Markku Kiviranta, Ilkka Moilanen, Jussi Roivainen

Proceedings of the International Conference on Military Communications and Information Systems, 2019

2018

REPLICA MBTAC: multithreaded dual-mode processor.

Martti Forsell, Jussi Roivainen, Ville Leppänen

J. Supercomput., 2018

Supporting concurrent memory access in TCF processor architectures.

Martti Forsell, Jussi Roivainen, Ville Leppänen, Jesper Larsson Träff

Microprocess. Microsystems, 2018

Implementation of Multioperations in Thick Control Flow Processors.

Martti Forsell, Jussi Roivainen, Ville Leppänen, Jesper Larsson Träff

Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium Workshops, 2018

2017

Supporting concurrent memory access in TCF-aware processor architectures.

Martti Forsell, Jussi Roivainen, Ville Leppänen, Jesper Larsson Träff

Proceedings of the IEEE Nordic Circuits and Systems Conference, 2017

2016

Outline of a Thick Control Flow Architecture.

Martti Forsell, Jussi Roivainen, Ville Leppänen

Proceedings of the 2016 International Symposium on Computer Architecture and High Performance Computing Workshops, 2016

The REPLICA on-chip network.

Martti Forsell, Jussi Roivainen, Ville Leppänen

Proceedings of the IEEE Nordic Circuits and Systems Conference, 2016

2014

Prototyping the MBTAC Processor for the REPLICA CMP.

Martti Forsell, Jussi Roivainen, Ville Leppänen

Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, 2014

REPLICA T7-16-128 - A 2048-threaded 16-core 7-FU chained VLIW chip multiprocessor.

Martti Forsell, Jussi Roivainen

Proceedings of the 48th Asilomar Conference on Signals, Systems and Computers, 2014

2008

Performance, Area and Power Trade-Offs in Mesh-based Emulated Shared Memory CMP Architectures.

Martti Forsell, Jussi Roivainen

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2008

2006

Clock-Gating in FPGAs: A Novel and Comparative Evaluation.

Yan Zhang, Jussi Roivainen, Aarne Mämmelä

Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006

2004

IP-Block Based Integration of Very High Performance WLAN Modem.

Jussi Roivainen, Jukka Rautio

Proceedings of the 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August, 2004

2002

Configurable Memory Organisation for Communication Applications.

Juha-Pekka Soininen, Antti Pelkonen, Jussi Roivainen

Proceedings of the 2002 Euromicro Symposium on Digital Systems Design (DSD 2002), 2002

2001

Providing network connectivity for small appliances: a functionally minimized embedded Web server.

Janne Riihijärvi, Petri Mähönen, Mika J. Saaranen, Jussi Roivainen, Juha-Pekka Soininen

IEEE Commun. Mag., 2001