K. S. Raghunathan

According to our database1, K. S. Raghunathan authored at least 8 papers between 1982 and 1993.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

1993
An Automatic Netlist-to-Schematic Generator.
IEEE Des. Test Comput., 1993

BEST: Bond Editor and Test Vector Translator.
Proceedings of the Sixth International Conference on VLSI Design, 1993

FLOR: A Hierarchical Floorplanner Under Vinyas VCX System - System Overview.
Proceedings of the Sixth International Conference on VLSI Design, 1993

1992
Constrained Via Minimisation In Greedy Channel Routing.
Proceedings of the Fifth International Conference on VLSI Design, 1992

N2S: An Automatic Netlist to Schematic generator.
Proceedings of the Fifth International Conference on VLSI Design, 1992

1983
Relationship between performance parameters for transport and network services.
Proceedings of the symposium on Communications Architectures & Protocols, 1983

1982
Experience with Formal Specifications Using an Extended State Transition Model.
IEEE Trans. Commun., 1982

Some Experience with the Use of Formal Specifications.
Proceedings of the Protocol Specification, 1982


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