Kai Ho Mak

According to our database1, Kai Ho Mak authored at least 6 papers between 2014 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2017
Enhanced active-feedback frequency compensation with on-chip-capacitor reduction feature for amplifiers with large capacitive load.
Int. J. Circuit Theory Appl., 2017

2016
A Two-Stage Large-Capacitive-Load Amplifier With Multiple Cross-Coupled Small-Gain Stages.
IEEE Trans. Very Large Scale Integr. Syst., 2016

2015
A 0.7V 24µA Hybrid OTA Driving 15 nF Capacitive Load With 1.46 MHz GBW.
IEEE J. Solid State Circuits, 2015

Design considerations of STCB OTA in CMOS 65nm with large capacitive loads.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014
An Area-Efficient 96.5%-Peak-Efficiency Cross-Coupled Voltage Doubler With Minimum Supply of 0.8 V.
IEEE Trans. Circuits Syst. II Express Briefs, 2014

A Signal- and Transient-Current Boosting Amplifier for Large Capacitive Load Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014


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