Ka Nang Leung

Orcid: 0000-0002-9921-3211

According to our database1, Ka Nang Leung authored at least 82 papers between 1999 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
A Li-ion-Battery-Input 1-to-6V-Output Bootstrap-Free Hybrid Buck-or-Boost Converter Without RHP Zero Achieving 97.3% Peak Efficiency 6μs Recovery Time and 1.13μs/V DVS Rate.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2023
A Decentralized Control Scheme for Active Power Filter Parallel System.
Proceedings of the 49th Annual Conference of the IEEE Industrial Electronics Society, 2023

2022
Full-Wave Sense-FET-Based Inductor-Current Sensor With Wide Dynamic Range for Buck Converters.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

A Triple-Mode DC-DC Converter With Wide Input and Load Ranges for Energy Harvesting in IoT Edge Nodes.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

An Analog-Assisted Digital LDO With Dynamic-Biasing Asynchronous Comparator.
IEEE Access, 2022

A Hybrid Low-Dropout Regulator With Load Regulation Correction.
IEEE Access, 2022

An Ultra-Low-Supply Output-Capacitorless LDO with Signal- and Transient-Enhancement.
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022

2021
A dual-power-path charge pump for solar-energy harvesting.
Int. J. Circuit Theory Appl., 2021

2020
Bandwidth and Slew Rate Enhanced OTA With Sustainable Dynamic Bias.
IEEE Trans. Circuits Syst. II Express Briefs, 2020

Adaptive-biased sense-FET-based inductor-current sensor for 10-MHz buck converter.
Int. J. Circuit Theory Appl., 2020

A 40nm CMOS Hysteretic Buck DC-DC Converter With Digital-Controlled Power-Driving-Tracked-Duration Current Pump.
IEEE Access, 2020

An Output-Capacitorless Low-Dropout Regulator with High Slew Rate and Unity-Gain Bandwidth.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
Low-dropout regulator with dual cross-coupled current mirrors.
Int. J. Circuit Theory Appl., 2019

2018
A Fully Integrated Low-Dropout Regulator With Differentiator-Based Active Zero Compensation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

A 3.3-MHz fast-response load-dependent-on/off-time buck-boost DC-DC converter with low-noise hybrid full-wave current sensor.
Microelectron. J., 2018

2017
Enhanced active-feedback frequency compensation with on-chip-capacitor reduction feature for amplifiers with large capacitive load.
Int. J. Circuit Theory Appl., 2017

2016
A Two-Stage Large-Capacitive-Load Amplifier With Multiple Cross-Coupled Small-Gain Stages.
IEEE Trans. Very Large Scale Integr. Syst., 2016

Digitally-assisted constant-on-time dynamic-biasing technique for bandwidth and slew-rate enhancement in ultra-low-power low-dropout regulator.
Int. J. Circuit Theory Appl., 2016

A fast-response buck-boost DC-DC converter with constructed full-wave current sensor.
Proceedings of the International Symposium on Integrated Circuits, 2016

A regulated voltage multiplier for passive RFID Tag.
Proceedings of the International Symposium on Integrated Circuits, 2016

A Shared-MSB delay-line-based ADC with simultaneous quantization for digital control single-inductor-multiple-output DC-DC converter.
Proceedings of the International Symposium on Integrated Circuits, 2016

2015
A 5.4-mW 180-cm Transmission Distance 2.5-Mb/s Advanced Techniques-Based Novel Intrabody Communication Receiver Analog Front End.
IEEE Trans. Very Large Scale Integr. Syst., 2015

A 0.7V 24µA Hybrid OTA Driving 15 nF Capacitive Load With 1.46 MHz GBW.
IEEE J. Solid State Circuits, 2015

A digital-control sensorless current-mode boost converter with non-zero error bin compensation and seamless mode transition.
Proceedings of the 28th IEEE International System-on-Chip Conference, 2015

A robust cross-regulation-suppressed single-inductor multiple-output dc-dc converter with duty-regulated comparator control.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

A fixed-frequency auto-buck-boost SIMO DC-DC converter with duty-cycle redistribution and duty-predicted current control.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Design considerations of STCB OTA in CMOS 65nm with large capacitive loads.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Gain and slew rate enhancement for amplifiers through current starving and feeding.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014
An Area-Efficient 96.5%-Peak-Efficiency Cross-Coupled Voltage Doubler With Minimum Supply of 0.8 V.
IEEE Trans. Circuits Syst. II Express Briefs, 2014

A Signal- and Transient-Current Boosting Amplifier for Large Capacitive Load Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

Analysis of CMOS low-dropout regulator - Power-supply rejection ratio.
Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014

A 124-dB double-gain-boosted cascode amplifier with 92% rail-to-rail output swing.
Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014

Load regulation cancellation based on adaptive body bias for STC-LDOs.
Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014

2013
Sub-mW $LC$ Dual-Input Injection-Locked Oscillator for Autonomous WBSNs.
IEEE Trans. Very Large Scale Integr. Syst., 2013

A transient-improved low-dropout regulator with nested flipped voltage follower structure.
Int. J. Circuit Theory Appl., 2013

2012
A Fast-Response Pseudo-PWM Buck Converter With PLL-Based Hysteresis Control.
IEEE Trans. Very Large Scale Integr. Syst., 2012

Improved active-diode circuit used in voltage doubler.
Int. J. Circuit Theory Appl., 2012

A CMOS voltage regulator for passive RFID tag ICs.
Int. J. Circuit Theory Appl., 2012

A low-power MICS fractional-N frequency synthesizer for implantable biomedical systems.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012

2011
Dynamic Bias-Current Boosting Technique for Ultralow-Power Low-Dropout Regulator in Biomedical Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2011

Development of energy-efficient fast-transient CMOS low-dropout regulators for SoC applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2010
A Chip-Area Efficient Voltage Regulator for VLSI Systems.
IEEE Trans. Very Large Scale Integr. Syst., 2010

A 0.5-Hz High-Pass Cutoff Dual-Loop Transimpedance Amplifier for Wearable NIR Sensing Device.
IEEE Trans. Circuits Syst. II Express Briefs, 2010

A Fast-Transient Low-Dropout Regulator With Load-Tracking Impedance Adjustment and Loop-Gain Boosting Technique.
IEEE Trans. Circuits Syst. II Express Briefs, 2010

A CMOS Low-Dropout Regulator With a Momentarily Current-Boosting Voltage Buffer.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010

An Output-Capacitorless Low-Dropout Regulator With Direct Voltage-Spike Detection.
IEEE J. Solid State Circuits, 2010

A Low-Power Fast-Transient 90-nm Low-Dropout Regulator With Multiple Small-Gain Stages.
IEEE J. Solid State Circuits, 2010

A 6- μ W Chip-Area-Efficient Output-Capacitorless LDO in 90-nm CMOS Technology.
IEEE J. Solid State Circuits, 2010

A Low-Power Continuously-Calibrated Clock Recovery Circuit for UHF RFID EPC Class-1 Generation-2 Transponders.
IEEE J. Solid State Circuits, 2010

RF Module Design of Passive UHF RFID Tag Implemented in CMOS 90-nm Technology.
J. Low Power Electron., 2010

A 1.9 <i>µ</i>W Transient-Enhanced Low-Dropout Regulator with Voltage-Spike Suppression.
J. Low Power Electron., 2010

2009
A Single-inductor Dual-output Pseudo-DCM/CCM Buck and Boost Converter with Adaptive DC Current Compensation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

A Fold-back Current-limit Circuit with Load-insensitive Quiescent Current for CMOS Low Dropout Regulator.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Robust and Low Complexity Packet Detector Design for MB-OFDM UWB.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

A Low-power Signal Processing Front-end and Decoder for UHF Passive RFID Transponders.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008
A Fully Differential Band-Selective Low-Noise Amplifier for MB-OFDM UWB Receivers.
IEEE Trans. Circuits Syst. II Express Briefs, 2008

Development of Single-Transistor-Control LDO Based on Flipped Voltage Follower for SoC.
IEEE Trans. Circuits Syst. I Regul. Pap., 2008

A Low-Power CMOS Front-End for Photoplethysmographic Signal Acquisition With Robust DC Photocurrent Rejection.
IEEE Trans. Biomed. Circuits Syst., 2008

Compensation-Capacitor Free Pseudo Three-Stage Amplifier with Large Capacitive Loads.
Proceedings of the 4th IEEE International Symposium on Electronic Design, 2008

Design of a Low-Voltage CMOS Charge Pump.
Proceedings of the 4th IEEE International Symposium on Electronic Design, 2008

Design of passive UHF RFID tag in 130nm CMOS technology.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

Enhanced channel selection using digital low-IF in Weaver receiver architecture.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

2007
A Low-Dropout Regulator for SoC With Q-Reduction.
IEEE J. Solid State Circuits, 2007

2006
A voltage-mode PWM buck regulator with end-point prediction.
IEEE Trans. Circuits Syst. II Express Briefs, 2006

2005
An integrated CMOS current-sensing circuit for low-Voltage current-mode buck regulator.
IEEE Trans. Circuits Syst. II Express Briefs, 2005

Design of low-power analog drivers based on slew-rate enhancement circuits for CMOS low-dropout regulators.
IEEE Trans. Circuits Syst. II Express Briefs, 2005

A 1-V integrated current-mode boost converter in standard 3.3/5-V CMOS technologies.
IEEE J. Solid State Circuits, 2005

2004
A low-voltage CMOS low-dropout regulator with enhanced loop response.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

A 1.2V buck converter with a novel on-chip low-voltage current-sensing scheme.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Design of a 1.5-V high-order curvature-compensated CMOS bandgap reference.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Design considerations of recent advanced low-voltage low-temperature-coefficient CMOS bandgap voltage reference.
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

2003
A 2-V 23-μA 5.3-ppm/°C curvature-compensated CMOS bandgap voltage reference.
IEEE J. Solid State Circuits, 2003

A capacitor-free CMOS low-dropout regulator with damping-factor-control frequency compensation.
IEEE J. Solid State Circuits, 2003

A CMOS voltage reference based on weighted ΔV<sub>GS</sub> for CMOS low-dropout linear regulators.
IEEE J. Solid State Circuits, 2003

A dual-path bandwidth extension amplifier topology with dual-loop parallel compensation.
IEEE J. Solid State Circuits, 2003

2002
A sub-1-V 15-ppm/°C CMOS bandgap voltage reference without requiring low threshold voltage device.
IEEE J. Solid State Circuits, 2002

A 2-V 23-μA 5.3-ppm/°C 4th-order curvature-compensated CMOS bandgap reference.
Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002

2000
Three-stage large capacitive load amplifier with damping-factor-control frequency compensation.
IEEE J. Solid State Circuits, 2000

Analysis on an alternative structure of damping-factor-control frequency compensation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999
A novel frequency compensation technique for low-voltage low-dropout regulator.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

Optimum nested Miller compensation for low-voltage low-power CMOS amplifier design.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

Right-half-plane zero removal technique for low-voltage low-power nested Miller compensation CMOS amplifier.
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999


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