Kapil Anand

According to our database1, Kapil Anand authored at least 15 papers between 2008 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2017
DynODet: Detecting Dynamic Obfuscation in Malware.
Proceedings of the Detection of Intrusions and Malware, and Vulnerability Assessment, 2017

RL-Bin, Robust Low-overhead Binary Rewriter.
Proceedings of the 2017 Workshop on Forming an Ecosystem Around Software Transformation, 2017

2016
A Stack Memory Abstraction and Symbolic Analysis Framework for Executables.
ACM Trans. Softw. Eng. Methodol., 2016

2015
Affine Parallelization Using Dependence and Cache Analysis in a Binary Rewriter.
IEEE Trans. Parallel Distributed Syst., 2015

Instruction-Cache Locking for Improving Embedded Systems Performance.
ACM Trans. Embed. Comput. Syst., 2015

2014
Affine Parallelization of Loops with Run-Time Dependent Bounds from Binaries.
Proceedings of the Programming Languages and Systems, 2014

2013
A compiler level intermediate representation based binary analysis system and its applications.
PhD thesis, 2013

Static binary rewriting without supplemental information: Overcoming the tradeoff between coverage and correctness.
Proceedings of the 20th Working Conference on Reverse Engineering, 2013

Scalable variable and data type detection in a binary rewriter.
Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation, 2013

An Accurate Stack Memory Abstraction and Symbolic Analysis Framework for Executables.
Proceedings of the 2013 IEEE International Conference on Software Maintenance, 2013

A compiler-level intermediate representation based binary analysis and rewriting system.
Proceedings of the Eighth Eurosys Conference 2013, 2013

2011
Retrofitting Security in COTS Software with Binary Rewriting.
Proceedings of the Future Challenges in Security and Privacy for Academia and Industry, 2011

2010
Automatic Parallelization in a Binary Rewriter.
Proceedings of the 43rd Annual IEEE/ACM International Symposium on Microarchitecture, 2010

2009
Instruction cache locking inside a binary rewriter.
Proceedings of the 2009 International Conference on Compilers, 2009

2008
Functional DIF for Rapid Prototyping.
Proceedings of the 19th IEEE/IFIP International Symposium on Rapid System Prototyping: RSP 2009, 2008


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