Kavindra Kandpal

According to our database, Kavindra Kandpal authored at least 23 papers between 2019 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2026

Design of Hybrid, High-Speed, Nonvolatile Ternary Content Addressable Memory Using CMOS and RRAM.

Mohit Gupta, Ravi S. Siddanath, Layak Singh Yadav, Mudit Gupta, Manish Goswami, Kavindra Kandpal

J. Circuits Syst. Comput., 2026

Efficient, reliable, and secure PUF architecture with temperature invariance and ML attack resilience.

Nitish Kumar, Aakif Nehal, Aditya Vikram Singh, Kavindra Kandpal, Manish Goswami

Integr., 2026

A Comprehensive Survey of Custom Layout Techniques for 6T, 8T, and 10T SRAM Bitcells Across Planar CMOS and FinFET Technology Nodes.

Ravi S. Siddanath, Sukhen Mondal, Manish Goswami, Kavindra Kandpal

IEEE Access, 2026

2025

High-Precision BGR Design with Advanced Curvature Compensation & Optimized Layout in 28 nm CMOS Technology.

Ravi S. Siddanath, Mohit Gupta, R. Dhirendra Rao, Souvik Kumar Das, Raghavendra Manjunath Hegde, Prasanna Kumar Misra, Manish Goswami, Kavindra Kandpal

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2025

Energy-Efficient, Nonvolatile 8T-2MTJ Ternary CAM Cell for Low Search Delay.

Mohit Gupta, Ravi S. Siddanath, Mudit Gupta, Surya Prakash, Manish Goswami, Kavindra Kandpal

Proceedings of the 7th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2025

2024

A Highly Reliable, Stacked-Capacitor, Voltage-Programmed Pixel Circuit Using a-IGZO TFTs for AMOLED Displays.

Divya Dubey, Akriti Srivastava, Manish Goswami, Kavindra Kandpal

J. Circuits Syst. Comput., October, 2024

A 10T SRAM architecture with 40 % enhanced throughput for IMC applications benchmarked with CIFAR-10 dataset.

Ravi S. Siddanath, Mohit Gupta, Chaitanya Joshi, Manish Goswami, Kavindra Kandpal

Integr., 2024

Highly Reliable, Feed-Forward and Multi-Arbiter based Physical Unclonable Function for IoT security.

Nitish Kumar, Sneha Chaudhary, Kavindra Kandpal, Manish Goswami

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2024

Low IF CMOS Receiver with 3-Stage LNA for Sub-GHz Communication.

Shivam Kumar Jha, Apsana Khatoon, Priyanka Tiwari, Dipti, Kavindra Kandpal, Manish Goswami, Prasanna Kumar Misra

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2024

2023

Design and Analysis of Low-Voltage, MOS-only Bandgap Reference Circuit.

Tej Prakash Sahu, Ritesh Kumar Tiwari, Prasanna Kumar Misra, Manish Goswami, Kavindra Kandpal

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2023

Multiplexer & Memory Efficient Bit-Reversal Algorithms.

Basamgari Bhanu Prakash Reddy, Nitish Kumar, Kavindra Kandpal, Manish Goswami

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2023

2022

Parametric investigation and trap sensitivity of <i>n-p-n</i> double gate TFETs.

Deepjyoti Deb, Rupam Goswami, Ratul Kr. Baruah, Kavindra Kandpal, Rajesh Saha

Comput. Electr. Eng., 2022

Design of a Low-Voltage Charge-Sensitive Preamplifier Interfaced with Piezoelectric Tactile Sensor for Tumour Detection.

Kingsuk Bag, Kislay Deep, Sharad Verma, Shashi Prabha Yadav, Manish Goswami, Kavindra Kandpal

Proceedings of the VLSI Design and Test - 26th International Symposium, 2022

A 14 nm Single-Ended Schmitt Trigger SRAM Cell for Improved SNM & Delay.

Nanda Deep Vallamchetty, Manish Goswami, Kavindra Kandpal

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2022

Concurrent Dual Band CMOS LNA with improved IIP3 using Modified DS technique.

Sudhanshu Kumar, Amar Nath Yadav, Kavindra Kandpal

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2022

Design of Hexagonal Oscillator for True Random Number Generation.

Krishan Mehra, Dhirendra Kumar, Kavindra Kandpal, Prasanna Kumar Misra, Manish Goswami

Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

2021

Mechanical strain and bias-stress compensated, 6T-1C pixel circuit for flexible AMOLED displays.

Akriti Srivastava, Divya Dubey, Manish Goswami, Kavindra Kandpal

Microelectron. J., 2021

Design and Analysis of SRAM Cell using Negative Bit-Line Write Assist Technique and Separate Read Port for High-Speed Applications.

Jitendra Kumar Mishra, Lakshmi Likhitha Mankali, Kavindra Kandpal, Prasanna Kumar Misra, Manish Goswami

J. Circuits Syst. Comput., 2021

2020

Design of threshold voltage insensitive pixel driver circuitry using a-IGZO TFT for AMOLED displays.

Aditya Sodhani, Kavindra Kandpal

Microelectron. J., 2020

Design of DQPSK Demodulator for Implantable Biomedical Devices.

Vaibhav Garg, Kavindra Kandpal

J. Circuits Syst. Comput., 2020

Design of a voltage-programmed <i>V</i> _TH compensating pixel circuit for AMOLED displays using diode-connected a-IGZO TFT.

Aryamick Singh, Manish Goswami, Kavindra Kandpal

IET Circuits Devices Syst., 2020

Design of a Threshold Voltage Insensitive 3T1C Pixel Circuit Using a-IGZO TFT for AMOLED Displays.

Aryamick Singh, Kavindra Kandpal

Proceedings of the 2020 24th International Symposium on VLSI Design and Test (VDAT), 2020

2019

IIP3 Improvement in Subthreshold LNAs Using Modified Derivative Superposition Technique for IoT Applications.

Anant Rungta, Kavindra Kandpal

Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019