Kesava R. Talupuru

According to our database, Kesava R. Talupuru authored at least 3 papers between 2005 and 2011.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2011

Achieving Glitch-Free Clock Domain Crossing Signals Using Formal Verification, Static Timing Analysis, and Sequential Equivalence Checking.

Kesava R. Talupuru, Sanjai Athi

Proceedings of the 12th International Workshop on Microprocessor Test and Verification, 2011

2008

Simulation Acceleration with HW Re-Compilation Avoidance.

Kyuho Shim, Kesava R. Talupuru, Maciej J. Ciesielski, Seiyang Yang

Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008

2005

Functional test generation based on word-level SAT.

Zhihong Zeng, Kesava R. Talupuru, Maciej J. Ciesielski

J. Syst. Archit., 2005