Kevin Patino-Sosa
Orcid: 0000-0003-1436-5636
According to our database1,
Kevin Patino-Sosa authored at least 3 papers
between 2025 and 2026.
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Bibliography
2026
A 32-Channel 85.4 dB SNDR Time-Multiplexed Neural Recording Front-End Achieving Within-Conversion Artifact Recovery.
IEEE J. Solid State Circuits, March, 2026
2025
A Dynamically Reconfigurable Digital-Integrated Voltage-Regulator Fabric for Energy-Efficient DVFS in Multi-Domain soCs.
Proceedings of the IEEE International Solid-State Circuits Conference, 2025
A 0.14µJ Per-Acquisition Frequency Domain GPS Correlator Using Adaptive Compressive Sampling.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2025