Khaled M. Sharaf

According to our database1, Khaled M. Sharaf authored at least 9 papers between 1994 and 2008.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2008
A varactorless technique for tuning LC oscillators based on loop gain adjustment.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007
A Fully Integrated 2.4GHz CMOS Frequency Synthesizer Using a Ring-Based VCO with Inductive Peaking.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006
2 GHz 1V sub-mW, fully integrated PLL for clock recovery applications using self-skewing.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2000
On the utilization of strength-reduced architectures for adaptive equalizers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1996
Analysis and optimization of series-gated CML and ECL high-speed bipolar circuits.
IEEE J. Solid State Circuits, 1996

1995
Active-pull-down nonthreshold logic BiCMOS circuits for high-speed low-power applications.
IEEE J. Solid State Circuits, June, 1995

1994
An accurate analytical propagation delay model for high-speed CML bipolar circuits.
IEEE J. Solid State Circuits, January, 1994

BiCMOS Active-Pull-Down Non-Threshold Logic Cicuits for High-Speed Low-Power Applications.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

Low-power differential CML and ECL BiCMOS circuit techniques.
Proceedings of the Fourth Great Lakes Symposium on Design Automation of High Performance VLSI Systems, 1994


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