Kishore N. Menezes

According to our database, Kishore N. Menezes authored at least 12 papers between 1995 and 2000.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2000

System-level power consumption modeling and tradeoff analysis techniques for superscalar processor design.

Thomas M. Conte, Kishore N. Menezes, Sumedh W. Sathaye, Mark C. Toburen

IEEE Trans. Very Large Scale Integr. Syst., 2000

The Intel IA-64 Compiler Code Generator.

Jay Bharadwaj, William Y. Chen, Weihaw Chuang, Gerolf Hoflehner, Kishore N. Menezes, Kalyan Muthukumar, Jim Pierce

IEEE Micro, 2000

Wavefront Scheduling: Path Based Data Representation and Scheduling of Subgraphs.

Jay Bharadwaj, Kishore N. Menezes, Chris McKinsey

J. Instr. Level Parallelism, 2000

1998

MPS: Miss-Path Scheduling for Multiple-Issue Processors.

Sanjeev Banerjia, Sumedh W. Sathaye, Kishore N. Menezes, Thomas M. Conte

IEEE Trans. Computers, 1998

A Fast Interrupt Handling Scheme for VLIW Processors.

Emre Özer, Sumedh W. Sathaye, Kishore N. Menezes, Sanjeev Banerjia, Matthew D. Jennings, Thomas M. Conte

Proceedings of the 1998 International Conference on Parallel Architectures and Compilation Techniques, 1998

1997

Path Prediction for High Issue-Rate Processors.

Kishore N. Menezes, Sumedh W. Sathaye, Thomas M. Conte

Proceedings of the 1997 Conference on Parallel Architectures and Compilation Techniques (PACT '97), 1997

1996

Hardware-Based Profiling: An Effective Technique for Profile-Driven Optimization.

Thomas M. Conte, Burzin A. Patel, Kishore N. Menezes, J. Stan Cox

Int. J. Parallel Program., 1996

Accurate and Practical Profile-driven Compilation Using the Profile Buffer.

Thomas M. Conte, Kishore N. Menezes, Mary Ann Hirsch

Proceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture, 1996

Instruction Fetch Mechanisms for VLIW Architectures with Compressed Encodings.

Thomas M. Conte, Sanjeev Banerjia, Sergei Y. Larin, Kishore N. Menezes, Sumedh W. Sathaye

Proceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture, 1996

Reducing State Loss For Effective Trace Sampling of Superscalar Processors.

Thomas M. Conte, Mary Ann Hirsch, Kishore N. Menezes

Proceedings of the 1996 International Conference on Computer Design (ICCD '96), 1996

1995

Optimization of Instruction Fetch Mechanisms for High Issue Rates.

Thomas M. Conte, Kishore N. Menezes, Patrick M. Mills, Burzin A. Patel

Proceedings of the 22nd Annual International Symposium on Computer Architecture, 1995

A technique to determine power-efficient, high-performance superscalar processors.

Thomas M. Conte, Kishore N. Menezes, Sumedh W. Sathaye

Proceedings of the 28th Annual Hawaii International Conference on System Sciences (HICSS-28), 1995