Klaus Eckl

According to our database1, Klaus Eckl authored at least 10 papers between 1995 and 2003.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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In proceedings 
Article 
PhD thesis 
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Links

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Bibliography

2003
Technologienahe Retimingverfahren zur Optimierung synchroner digitaler Schaltungen.
PhD thesis, 2003

Performance-Directed Retiming for FPGAs Using Post-Placement Delay Information.
Proceedings of the 2003 Design, 2003

1999
Functional multiple-output decomposition with application to technology mapping for lookup table-based FPGAs.
ACM Trans. Design Autom. Electr. Syst., 1999

Retiming Sequential Circuits with Multiple Register Classes.
Proceedings of the 1999 Design, 1999

A Practical Approach to Multiple-Class Retiming.
Proceedings of the 36th Conference on Design Automation, 1999

1998
Computing support-minimal subfunctions during functional decomposition.
IEEE Trans. Very Large Scale Integr. Syst., 1998

1996
Performance-Directed Technology-Mapping for LUT-Based FPGAs - What Role Do Decomposition and Covering Play?
Proceedings of the Field-Programmable Logic, 1996

An Implicit Algorithm for Support Minimization during Functional Decomposition.
Proceedings of the 1996 European Design and Test Conference, 1996

A Boolean Approach to Performance-Directed Technology Mapping for LUT-Based FPGA Designs.
Proceedings of the 33st Conference on Design Automation, 1996

1995
Functional Multiple-Output Decomposition: Theory and an Implicit Algorithm.
Proceedings of the 32st Conference on Design Automation, 1995


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