Bernd Wurth

According to our database, Bernd Wurth authored at least 16 papers between 1994 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2022

OR for entrepreneurial ecosystems: A problem-oriented review and agenda.

Elias G. Carayannis, Evangelos Grigoroudis, Bernd Wurth

Eur. J. Oper. Res., 2022

2000

Automating RT-Level Operand Isolation to Minimize Power Consumption in Datapaths.

Michael Münch, Norbert Wehn, Bernd Wurth, Renu Mehra, Jim Sproch

Proceedings of the 2000 Design, 2000

1999

Functional multiple-output decomposition with application to technology mapping for lookup table-based FPGAs.

Bernd Wurth, Ulf Schlichtmann, Klaus Eckl, Kurt Antreich

ACM Trans. Design Autom. Electr. Syst., 1999

1998

Computing support-minimal subfunctions during functional decomposition.

Christian Legl, Bernd Wurth, Klaus Eckl

IEEE Trans. Very Large Scale Integr. Syst., 1998

1996

Logic synthesis with Boolean model.

Bernd Wurth

PhD thesis, 1996

Fast Power Estimation of Large Circuits.

Peter H. Schneider, Ulf Schlichtmann, Bernd Wurth

IEEE Des. Test Comput., 1996

Performance-Directed Technology-Mapping for LUT-Based FPGAs - What Role Do Decomposition and Covering Play?

Christian Legl, Klaus Eckl, Bernd Wurth

Proceedings of the Field-Programmable Logic, 1996

Power analysis for sequential circuits at logic level.

Matthias A. Senn, Peter H. Schneider, Bernd Wurth

Proceedings of the conference on European design automation, 1996

An Implicit Algorithm for Support Minimization during Functional Decomposition.

Christian Legl, Bernd Wurth, Klaus Eckl

Proceedings of the 1996 European Design and Test Conference, 1996

Reducing Power Dissipation after Technology Mapping by Structural Transformations.

Bernhard Rohfleisch, Alfred Kölbl, Bernd Wurth

Proceedings of the 33st Conference on Design Automation, 1996

A Boolean Approach to Performance-Directed Technology Mapping for LUT-Based FPGA Designs.

Christian Legl, Bernd Wurth, Klaus Eckl

Proceedings of the 33st Conference on Design Automation, 1996

1995

A BIST approach to delay fault testing with reduced test length.

Bernd Wurth, Karl Fuchs

Proceedings of the 1995 European Design and Test Conference, 1995

Functional Multiple-Output Decomposition: Theory and an Implicit Algorithm.

Bernd Wurth, Klaus Eckl, Kurt Antreich

Proceedings of the 32st Conference on Design Automation, 1995

Logic Clause Analysis for Delay Optimization.

Bernhard Rohfleisch, Bernd Wurth, Kurt Antreich

Proceedings of the 32st Conference on Design Automation, 1995

A new K-way partitioning approach for multiple types of FPGAs.

Bernhard M. Riess, Heiko A. Giselbrecht, Bernd Wurth

Proceedings of the 1995 Conference on Asia Pacific Design Automation, Makuhari, Massa, Chiba, Japan, August 29, 1995

1994

Efficient Calculation of Boolean Relations for Multi-Level Logic Optimization.

Bernd Wurth, Norbert Wehn

Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994