Koki Asahina

According to our database1, Koki Asahina authored at least 2 papers between 2024 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
Integrated Memory Grouping and Power-Aware MBIST Scheduling for MPSoCs.
Proceedings of the 7th Workshop on Next Generation Real-Time Embedded Systems, 2026

2024
Power-Efficient Acceleration of GCNs on Coarse-Grained Linear Arrays.
Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2024


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