Koki Asahina

According to our database, Koki Asahina authored at least 2 papers between 2024 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2026

Integrated Memory Grouping and Power-Aware MBIST Scheduling for MPSoCs.

Koki Asahina, Yasuhiko Nakashima

Proceedings of the 7th Workshop on Next Generation Real-Time Embedded Systems, 2026

2024

Power-Efficient Acceleration of GCNs on Coarse-Grained Linear Arrays.

Dohyun Kim, Koki Asahina, Yirong Kan, Renyuan Zhang, Yasuhiko Nakashima

Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2024