Krishnan S. Rengarajan

According to our database, Krishnan S. Rengarajan authored at least 5 papers between 2016 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2025

A 9.62 mW LMV Cell for mm-Wave Applications.

Krishnan S. Rengarajan, Pulkit Kathuria, Soumya Rank, Sourav Nandi, Saroj Mondal

Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

2022

Low Power, Wideband SiGe HBT LNA Covering 57-64 GHz Band.

Puneet Singh, Saroj Mondal, Krishnan S. Rengarajan

Proceedings of the VLSI Design and Test - 26th International Symposium, 2022

2021

Challenges to adopting adiabatic circuits for systems-on-a-chip.

Krishnan S. Rengarajan, Saroj Mondal, Ravindra Kapre

IET Circuits Devices Syst., 2021

2020

A Novel Hierarchical Circuit LUT Model for SOI Technology for Rapid Prototyping.

Sitansusekhar Roymohapatra, Ganesh R. Gore, Akanksha Yadav, Mahesh B. Patil, Krishnan S. Rengarajan, Subramanian S. Iyer, Maryam Shojaei Baghini

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

2016

A robust 8T FinFET SRAM cell with improved stability for low voltage applications.

C. B. Kushwah, Devesh Dwivedi, N. Sathisha, Krishnan S. Rengarajan

Proceedings of the 20th International Symposium on VLSI Design and Test, 2016