Laurent Arditi

According to our database1, Laurent Arditi authored at least 6 papers between 1995 and 2004.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

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Bibliography

2004
Late Design Changes (ECOs) for Sequentially Optimized Esterel Designs.
Proceedings of the Formal Methods in Computer-Aided Design, 5th International Conference, 2004

2001
Coverage Directed Generation of System-Level Test Cases for the Validation of a DSP System.
Proceedings of the FME 2001: Formal Methods for Increasing Software Productivity, 2001

2000
A semi-formal methodology for the functional validation of an industrial DSP system.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1996
BMDs Can Delay the Use of Theorem Proving for Verifying Arithmetic Assembly Instructions.
Proceedings of the Formal Methods in Computer-Aided Design, First International Conference, 1996

1995
Towards verifying VHDL descriptions of processors.
Proceedings of the Proceedings EURO-DAC'95, 1995

An Object-Oriented Framework for the Formal Verification of Processors.
Proceedings of the ECOOP'95, 1995


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