Michael Kishinevsky

IEEE Des. Test, December, 2023

Dynamic Power Management in Large Manycore Systems: A Learning-to-Search Framework.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., September, 2023

Fast Performance Analysis for NoCs With Weighted Round-Robin Arbitration and Finite Buffers.

[BibT_eX]

[DOI]

Sumit K. Mandal

IEEE Trans. Very Large Scale Integr. Syst., May, 2023

Introduction to the Special Issue on Domain-Specific System-on-Chip Architectures and Run-Time Management Techniques.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., March, 2023

Domain-Specific Architectures: Research Problems and Promising Approaches.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., March, 2023

Machine Learning for Microprocessor Performance Bug Localization.

[BibT_eX]

[DOI]

Erick Carvajal Barboza

CoRR, 2023

Machine Learning-based Low Overhead Congestion Control Algorithm for Industrial NoCs.

[BibT_eX]

[DOI]

CoRR, 2023

Uncertainty-Aware Online Learning for Dynamic Power Management in Large Manycore Systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2023

A Lightweight Congestion Control Technique for NoCs with Deflection Routing.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2022

DPM-NFV: Dynamic Power Management Framework for 5G User Plane Function using Bayesian Optimization.

[BibT_eX]

[DOI]

Proceedings of the IEEE Global Communications Conference, 2022

2021

Analytical Performance Modeling of NoCs under Priority Arbitration and Bursty Traffic.

[BibT_eX]

[DOI]

IEEE Embed. Syst. Lett., 2021

RAMBO: Resource Allocation for Microservices Using Bayesian Optimization.

[BibT_eX]

[DOI]

IEEE Comput. Archit. Lett., 2021

MOBO-NFV: Automated Tuning of a Network Function Virtualization System using Multi-Objective Bayesian Optimization.

[BibT_eX]

[DOI]

Proceedings of the 17th IFIP/IEEE International Symposium on Integrated Network Management, 2021

Theoretical Analysis and Evaluation of NoCs with Weighted Round-Robin Arbitration.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

Automatic Microprocessor Performance Bug Detection.

[BibT_eX]

[DOI]

Erick Carvajal Barboza

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

2020

A Survey on Energy Management for Mobile and IoT Devices.

[BibT_eX]

[DOI]

IEEE Des. Test, 2020

Guest Editors' Introduction: Design and Management of Mobile Platforms: From Smartphones to Wearable Devices.

[BibT_eX]

[DOI]

IEEE Des. Test, 2020

Analytical modeling of NoCs for fast simulation and design exploration (invited).

[BibT_eX]

[DOI]

Proceedings of the SLIP '20: System-Level Interconnect, 2020

Performance Analysis of Priority-Aware NoCs with Deflection Routing under Traffic Congestion.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

Online Adaptive Learning for Runtime Resource Management of Heterogeneous SoCs.

[BibT_eX]

[DOI]

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019

Analytical Performance Models for NoCs with Multiple Priority Traffic Classes.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2019

Hardware-Assisted Cross-Generation Prediction of GPUs Under Design.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

Understanding the impact of number of CPU cores on user satisfaction in smartphones.

[BibT_eX]

[DOI]

Niranjan Soundararajan

Gokhan Memik

Proceedings of the MobiQuitous 2019, 2019

PerfProbe: a systematic, cross-layer performance diagnosis framework for mobile platforms.

[BibT_eX]

[DOI]

Proceedings of the 6th International Conference on Mobile Software Engineering and Systems, 2019

2018

Dynamic Power Budgeting for Mobile Systems Running Graphics Workloads.

[BibT_eX]

[DOI]

Niranjan Soundararajan

Ugurkan Tursun

IEEE Trans. Multi Scale Comput. Syst., 2018

An Online Learning Methodology for Performance Modeling of Graphics Processors.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2018

STAFF: online learning with stabilized adaptive forgetting factor and feature selection algorithm.

[BibT_eX]

[DOI]

Proceedings of the 55th Annual Design Automation Conference, 2018

2017

User-aware Frame Rate Management in Android Smartphones.

[BibT_eX]

[DOI]

Niranjan Soundararajan

ACM Trans. Embed. Comput. Syst., 2017

HALWPE: Hardware-Assisted Light Weight Performance Estimation for GPUs.

[BibT_eX]

[DOI]

Proceedings of the 54th Annual Design Automation Conference, 2017

Multi-variable Dynamic Power Management for the GPU Subsystem.

[BibT_eX]

[DOI]

Tajana Simunic Rosing

Proceedings of the 54th Annual Design Automation Conference, 2017

Adaptive Performance Sensitivity Model to Support GPU Power Management.

[BibT_eX]

[DOI]

Proceedings of the 1st Workshop on AutotuniNg and aDaptivity AppRoaches for Energy efficient HPC Systems, 2017

2016

Adaptive performance prediction for integrated GPUs.

[BibT_eX]

[DOI]

Proceedings of the 35th International Conference on Computer-Aided Design, 2016

2015

RTL Synthesis: From Logic Synthesis to Automatic Pipelining.

[BibT_eX]

[DOI]

Proc. IEEE, 2015

Multi-product floorplan and uncore design framework for chip multiprocessors.

[BibT_eX]

[DOI]

Proceedings of the 2015 ACM/IEEE International Workshop on System Level Interconnect Prediction, 2015

A control-theoretic approach for energy efficient CPU-GPU subsystem in mobile platforms.

[BibT_eX]

[DOI]

Proceedings of the 52nd Annual Design Automation Conference, 2015

Optimizing mobile display brightness by leveraging human visual perception.

[BibT_eX]

[DOI]

Proceedings of the 2015 International Conference on Compilers, 2015

2014

Towards platform level power management in mobile systems.

[BibT_eX]

[DOI]

Proceedings of the 27th IEEE International System-on-Chip Conference, 2014

CAPED: Context-aware personalized display brightness for mobile devices.

[BibT_eX]

[DOI]

Proceedings of the 2014 International Conference on Compilers, 2014

2013

In-network monitoring and control policy for DVFS of CMP networks-on-chip and last level caches.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2013

Managing mobile platform power.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

Dynamic voltage and frequency scaling for shared resources in multicore processor designs.

[BibT_eX]

[DOI]

Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2012

Automatic generation of inductive invariants from high-level microarchitectural models of communication fabrics.

[BibT_eX]

[DOI]

Formal Methods Syst. Des., 2012

xMAS: Quick Formal Modeling of Communication Fabrics to Enable Verification.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2012

Design and optimization of communication fabrics: an industrial perspective.

[BibT_eX]

[DOI]

Proceedings of the International Workshop on System Level Interconnect Prediction, 2012

Energy-guided exploration of on-chip network design for exa-scale computing.

[BibT_eX]

[DOI]

Proceedings of the International Workshop on System Level Interconnect Prediction, 2012

Compositional performance verification of NoC designs.

[BibT_eX]

[DOI]

Proceedings of the Tenth ACM/IEEE International Conference on Formal Methods and Models for Codesign, 2012

2011

Microarchitectural Transformations Using Elasticity.

[BibT_eX]

[DOI]

ACM J. Emerg. Technol. Comput. Syst., 2011

A Scheduling Strategy for Synchronous Elastic Designs.

[BibT_eX]

[DOI]

Fundam. Informaticae, 2011

Verifying Deadlock-Freedom of Communication Fabrics.

[BibT_eX]

[DOI]

Alexander Gotmanov

Proceedings of the Verification, Model Checking, and Abstract Interpretation, 2011

System interconnect design exploration for embedded MPSoCs.

[BibT_eX]

[DOI]

Proceedings of the 2011 International Workshop on System Level Interconnect Prediction, 2011

Challenges in Verifying Communication Fabrics.

[BibT_eX]

[DOI]

Alexander Gotmanov

Yuriy Viktorov

Proceedings of the Interactive Theorem Proving - Second International Conference, 2011

2010

New Region-Based Algorithms for Deriving Bounded Petri Nets.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2010

On the Performance Evaluation of Multi-Guarded Marked Graphs with Single-Server Semantics.

[BibT_eX]

[DOI]

Jorge Júlvez

Discret. Event Dyn. Syst., 2010

Physical-Aware Link Allocation and Route Assignment for Chip Multiprocessing.

[BibT_eX]

[DOI]

Proceedings of the NOCS 2010, 2010

Elastic systems.

[BibT_eX]

[DOI]

Marc Galceran Oms

Proceedings of the 8th ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE 2010), 2010

Symbolic performance analysis of elastic systems.

[BibT_eX]

[DOI]

Marc Galceran Oms

Proceedings of the 2010 International Conference on Computer-Aided Design, 2010

Quick formal modeling of communication fabrics to enable verification.

[BibT_eX]

[DOI]

Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2010

Automatic microarchitectural pipelining.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2010

2009

Elastic Circuits.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

A Recursive Paradigm to Solve Boolean Relations.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2009

Timing-driven N-way decomposition.

[BibT_eX]

[DOI]

Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, 2009

Variable-latency design by function speculation.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2009

Speculation in elastic systems.

[BibT_eX]

[DOI]

Marc Galceran Oms

Proceedings of the 46th Design Automation Conference, 2009

Retiming and recycling for elastic systems with early evaluation.

[BibT_eX]

[DOI]

Proceedings of the 46th Design Automation Conference, 2009

Divide-and-Conquer Strategies for Process Mining.

[BibT_eX]

[DOI]

Proceedings of the Business Process Management, 7th International Conference, 2009

Scheduling Synchronous Elastic Designs.

[BibT_eX]

[DOI]

Proceedings of the Ninth International Conference on Application of Concurrency to System Design, 2009

Genet: A Tool for the Synthesis and Mining of Petri Nets.

[BibT_eX]

[DOI]

Proceedings of the Ninth International Conference on Application of Concurrency to System Design, 2009

2008

Elasticity and Petri Nets.

[BibT_eX]

[DOI]

Trans. Petri Nets Other Model. Concurr., 2008

A System Verilog Rewriting System for RTL Abstraction with Pentium Case Study.

[BibT_eX]

[DOI]

Proceedings of the 6th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2008), 2008

Correct-by-construction microarchitectural pipelining.

[BibT_eX]

[DOI]

Proceedings of the 2008 International Conference on Computer-Aided Design, 2008

A Region-Based Algorithm for Discovering Petri Nets from Event Logs.

[BibT_eX]

[DOI]

Proceedings of the Business Process Management, 6th International Conference, 2008

A Symbolic Algorithm for the Synthesis of Bounded Petri Nets.

[BibT_eX]

[DOI]

Proceedings of the Applications and Theory of Petri Nets, 29th International Conference, 2008

Time elastic digital systems and Petri Nets.

[BibT_eX]

[DOI]

Proceedings of the 8th International Conference on Application of Concurrency to System Design (ACSD 2008), 2008

2007

Guest Editors' Introduction: GALS Design and Validation.

[BibT_eX]

[DOI]

Sandeep K. Shukla

Ken S. Stevens

IEEE Des. Test Comput., 2007

A general model for performance optimization of sequential systems.

[BibT_eX]

[DOI]

Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

Layout-aware gate duplication and buffer insertion.

[BibT_eX]

[DOI]

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

Synchronous Elastic Circuits with Early Evaluation and Token Counterflow.

[BibT_eX]

[DOI]

Proceedings of the 44th Design Automation Conference, 2007

2006

Performance analysis of concurrent systems with early evaluation.

[BibT_eX]

[DOI]

Jorge Júlvez

Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

Dominator-based partitioning for delay optimization.

[BibT_eX]

[DOI]

Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006

Synchronous Elastic Networks.

[BibT_eX]

[DOI]

Proceedings of the Formal Methods in Computer-Aided Design, 6th International Conference, 2006

Synthesis of synchronous elastic architectures.

[BibT_eX]

[DOI]

Bill Grundmann

Proceedings of the 43rd Design Automation Conference, 2006

Synchronous Elastic Circuits.

[BibT_eX]

[DOI]

Proceedings of the Computer Science, 2006

2004

Late Design Changes (ECOs) for Sequentially Optimized Esterel Designs.

[BibT_eX]

[DOI]

Laurent Arditi

Gérard Berry

Proceedings of the Formal Methods in Computer-Aided Design, 5th International Conference, 2004

2003

System Level Design and Verification Using a Synchronous Language.

[BibT_eX]

[DOI]

Gérard Berry

Satnam Singh

Proceedings of the 2003 International Conference on Computer-Aided Design, 2003

2002

Lazy transition systems and asynchronous circuit synthesis withrelative timing assumptions.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002

Coordinated transformations for high-level synthesis of high performance microprocessor blocks.

[BibT_eX]

[DOI]

Proceedings of the 39th Design Automation Conference, 2002

2000

Hardware and Petri Nets: Application to Asynchronous Circuit Design.

[BibT_eX]

[DOI]

Proceedings of the Application and Theory of Petri Nets 2000, 2000

1999

Decomposition and technology mapping of speed-independent circuits using Boolean relations.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

Logic decomposition of speed-independent circuits.

[BibT_eX]

[DOI]

Proc. IEEE, 1999

Synthesis of asynchronous control circuits with automatically generated relative timing assumptions.

[BibT_eX]

[DOI]

Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999

CAD Directions for High Performance Asynchronous Circuits.

[BibT_eX]

[DOI]

Proceedings of the 36th Conference on Design Automation, 1999

Automatic Synthesis and Optimization of Partially Specified Asynchronous Systems.

[BibT_eX]

[DOI]

Proceedings of the 36th Conference on Design Automation, 1999

1998

Hazard-free implementation of speed-independent circuits.

[BibT_eX]

[DOI]

Alexandre Yakovlev

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998

Partial-scan delay fault testing of asynchronous circuits.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998

Deriving Petri Nets for Finite Transition Systems.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 1998

The Use of Petri Nets for the Design and Verification of Asynchronous Circuits and Systems.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 1998

Analysis of Petri Nets by Ordering Relations in Reduced Unfoldings.

[BibT_eX]

[DOI]

Formal Methods Syst. Des., 1998

Lazy transition systems: application to timing optimization of asynchronous circuits.

[BibT_eX]

[DOI]

Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998

Asynchronous Interface Specification, Analysis and Synthesis.

[BibT_eX]

[DOI]

Proceedings of the 35th Conference on Design Automation, 1998

Identifying State Coding Conflicts in Asynchronous System Specifications Using Petri Net Unfoldings.

[BibT_eX]

[DOI]

Proceedings of the 1st International Conference on Application of Concurrency to System Design (ACSD '98), 1998

1997

A region-based theory for state assignment in speed-independent circuits.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997

Technology mapping of speed-independent circuits based on combinational decomposition and resynthesis.

[BibT_eX]

[DOI]

Proceedings of the European Design and Test Conference, 1997

Technology Mapping for Speed-Independent Circuits: Decomposition and Resynthesis.

[BibT_eX]

[DOI]

Proceedings of the 3rd International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '97), 1997

Coupling Asynchrony and Interrupts: Place Chart Nets.

[BibT_eX]

[DOI]

Proceedings of the Application and Theory of Petri Nets 1997, 1997

1996

On the Models for Asynchronous Circuit Behaviour with OR Causality.

[BibT_eX]

[DOI]

Marta Pietkiewicz-Koutny

Formal Methods Syst. Des., 1996

Methodology and Tools for State Encoding in Asynchronous Circuit Synthesis.

[BibT_eX]

[DOI]

Proceedings of the 33st Conference on Design Automation, 1996

Complete state encoding based on the theory of regions.

[BibT_eX]

[DOI]

Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '96), 1996

A Structural Approach for the Analysis of Petri Nets by Reduced Unfoldings.

[BibT_eX]

[DOI]

Proceedings of the Application and Theory of Petri Nets 1996, 1996

1995

Synthesizing Petri nets from state-based models.

[BibT_eX]

[DOI]

Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995

Checking signal transition graph implementability by symbolic BDD traversal.

[BibT_eX]

[DOI]

Proceedings of the 1995 European Design and Test Conference, 1995

1994

Specification and analysis of self-timed circuits.

[BibT_eX]

[DOI]

Alexander Taubin

J. VLSI Signal Process., 1994

Analysis and Identification of Speed-Independent Circuits on an Event Model.

[BibT_eX]

[DOI]

Formal Methods Syst. Des., 1994

Mechanized Verification of Speed-independence.

[BibT_eX]

[DOI]

Jørgen Staunstrup

Proceedings of the Theorem Provers in Circuit Design, 1994

Change Diagram : A behavioural model for very speed VLSI circuit/highly parallel systems.

[BibT_eX]

[DOI]

Proceedings of the Second Euromicro Workshop on Parallel and Distributed Processing, 1994

Testing redundant asynchronous circuits by variable phase splitting.

[BibT_eX]

[DOI]

Luciano Lavagno

Antonio Lioy

Proceedings of the Proceedings EURO-DAC'94, 1994

Performance Analysis Based on Timing Simulation.

[BibT_eX]

[DOI]

Christian D. Nielsen

Proceedings of the 31st Conference on Design Automation, 1994

Basic Gate Implementation of Speed-Independent Circuits.

[BibT_eX]

[DOI]

Proceedings of the 31st Conference on Design Automation, 1994

Characterizing speed-independence of high-level designs.

[BibT_eX]

[DOI]

Jørgen Staunstrup

Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems, 1994

OR Causality: Modelling and Hardware Implementation.

[BibT_eX]

[DOI]

Proceedings of the Application and Theory of Petri Nets 1994, 1994

1992

Analysis and Identification of Self-Timed Circuits.

[BibT_eX]

Proceedings of the Designing Correct Circuits, 1992

1991

Formal method for self-timed design.

[BibT_eX]

[DOI]