Leonard F. Register
Affiliations:- University of Texas at Austin, Microelectronics Research Center, TX, USA
According to our database1,
Leonard F. Register
authored at least 8 papers
between 1998 and 2024.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 2016, "For contributions to modeling of charge transport in nanoscale CMOS devices".
Timeline
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Bibliography
2024
Impact of Multi-Domain Microscopic Interactions on Magnetic Tunnel Junction's Static and Transient Characteristics.
Proceedings of the Device Research Conference, 2024
Proceedings of the Device Research Conference, 2024
2021
Machine Learning for Statistical Modeling: The Case of Perpendicular Spin-Transfer-Torque Random Access Memory.
ACM Trans. Design Autom. Electr. Syst., 2021
2019
Tunnel Barrier Thickness, Interlayer Rotational Alignment, and Top Gating Effects on ReS2/hBN/ReS2 Resonant Interlayer Tunnel Field Effect Transistors.
Proceedings of the Device Research Conference, 2019
2010
2001
Impact of Scaling on CMOS Chip Failure Rate, and Design Rules for Hot Carrier Reliability.
VLSI Design, 2001
1998
Simulation of Optical Excitation to and Emission from Electron Fabry-Perot States Subject to Strong Inelastic Scattering.
VLSI Design, 1998
VLSI Design, 1998