Liang-Hsin Lin

According to our database, Liang-Hsin Lin authored at least 4 papers between 2023 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2026

A 4.8-mW Hybrid Crypto SoC With Post-Quantum Cryptography and Lightweight Cryptography for Secure Neural Interfacing.

Liang-Hsin Lin, Zih-Sing Fu, Po-Shao Chen, Bo-Yin Yang, Chia-Hsiang Yang

IEEE J. Solid State Circuits, May, 2026

2025

17.3 A 30.4GOPS/mW MK-CKKS Processor for Secure Multi-Party Computation.

Liang-Hsin Lin, Yao-Kai Yang, Chia-Hsiang Yang

Proceedings of the IEEE International Solid-State Circuits Conference, 2025

2023

An Energy-Efficient Double Ratchet Cryptographic Processor With Backward Secrecy for IoT Devices.

Sheng-Jung Yu, Yu-Chi Lee, Liang-Hsin Lin, Chia-Hsiang Yang

IEEE J. Solid State Circuits, 2023

A 4.8mW, 800Mbps Hybrid Crypto SoC for Post-Quantum Secure Neural Interfacing.

Liang-Hsin Lin, Zih-Sing Fu, Po-Shao Chen, Bo-Yin Yang, Chia-Hsiang Yang

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023