Ling Zhuo

According to our database1, Ling Zhuo authored at least 21 papers between 2002 and 2008.

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Bibliography

2008
Area-Efficient Arithmetic Expression Evaluation Using Deeply Pipelined Floating-Point Cores.
IEEE Trans. Very Large Scale Integr. Syst., 2008

Scalable Hybrid Designs for Linear Algebra on Reconfigurable Computing Systems.
IEEE Trans. Computers, 2008

High-Performance Designs for Linear Algebra Operations on Reconfigurable Hardware.
IEEE Trans. Computers, 2008

Matrix Computations on Heterogeneous Reconfigurable Systems.
Proceedings of the 16th IEEE International Symposium on Field-Programmable Custom Computing Machines, 2008

2007
Scalable and Modular Algorithms for Floating-Point Matrix Multiplication on Reconfigurable Computing Systems.
IEEE Trans. Parallel Distributed Syst., 2007

High-Performance Reduction Circuits Using Deeply Pipelined Operators on FPGAs.
IEEE Trans. Parallel Distributed Syst., 2007

Optimizing Matrix Multiplication on Heterogeneous Reconfigurable Systems.
Proceedings of the Parallel Computing: Architectures, 2007

Hardware/Software Co-Design for Matrix Computations on Reconfigurable Computing Systems.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

2006
High-Performance and Parameterized Matrix Factorization on FPGAs.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

2005
High Performance Linear Algebra Operations on Reconfigurable Systems.
Proceedings of the ACM/IEEE SC2005 Conference on High Performance Networking and Computing, 2005

High-Performance and Area-Efficient Reduction Circuits on FPGAs.
Proceedings of the 17th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2005), 2005

Designing Scalable FPGA-Based Reduction Circuits Using Pipelined Floating-Point Cores.
Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005

Design Tradeoffs for BLAS Operations on Reconfigurable Hardware.
Proceedings of the 34th International Conference on Parallel Processing (ICPP 2005), 2005

Sparse Matrix-Vector multiplication on FPGAs.
Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, 2005

High-Performance FPGA-Based General Reduction Methods.
Proceedings of the 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 2005

Area-Efficient Evaluation of a Class of Arithmetic Expressions Using Deeply Pipelined Floating-Point Cores.
Proceedings of The 2005 International Conference on Engineering of Reconfigurable Systems and Algorithms, 2005

2004
Scalable and Modular Algorithms for Floating-Point Matrix Multiplication on FPGAs.
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004

Analysis of High-Performance Floating-Point Arithmetic on FPGAs.
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004

Energy Performance of Floating-Point Matrix Multiplication on FPGAs.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, 2004

2003
Document replication and distribution in extensible geographically distributed web servers.
J. Parallel Distributed Comput., 2003

2002
Load Balancing in Distributed Web Server Systems with Partial Document Replication.
Proceedings of the 31st International Conference on Parallel Processing (ICPP 2002), 2002


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