Seonil Brian Choi

According to our database, Seonil Brian Choi authored at least 18 papers between 1996 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2025

2nm GAA Cell Architecture Exploration Driven by Automated Standard Cell Layout Generator for Design-Technology Co-Optimization.

Inhyeok Hwang, Ahreum Kim, Byungsu Kim, Seonil Choi, Handong Cho, Hyunbae Seo, Taewhan Kim

Proceedings of the 38th IEEE International System-on-Chip Conference, 2025

2024

An injection-point determination algorithm for intelligent injection robot systems.

Seonil Choi, Seho Kim, Kiwon Yeom

IEICE Electron. Express, 2024

2021

TestQuBE: A Testbench Enhancement Methodology for Universal Serial Interfaces in Complex SoCs.

Aditya Kulkarni, Ayush Singh, Sachin Arun Waje, Sunil Shrirangrao Kashide, Seonil Brian Choi

Proceedings of the 34th IEEE International System-on-Chip Conference, 2021

2005

Energy- and time-efficient matrix multiplication on FPGAs.

Ju-wook Jang, Seonil Brian Choi, Viktor K. Prasanna

IEEE Trans. Very Large Scale Integr. Syst., 2005

Energy-efficient hardware/software co-synthesis for a class of applications on reconfigurable SoCs.

Jingzhao Ou, Seonil Brian Choi, Viktor K. Prasanna

Int. J. Embed. Syst., 2005

2004

Analysis of High-Performance Floating-Point Arithmetic on FPGAs.

Gokul Govindu, Ling Zhuo, Seonil Choi, Viktor K. Prasanna

Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004

A High-Performance and Energy-Efficient Architecture for Floating-Point Based LU Decomposition on FPGAs.

Gokul Govindu, Seonil Choi, Viktor K. Prasanna, Vikash Daga, Sridhar Gangadharpalli, V. Sridhar

Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004

2003

Domain-Specific Modeling for Rapid Energy Estimation of Reconfigurable Architectures.

Seonil Choi, Ju-wook Jang, Sumit Mohanty, Viktor K. Prasanna

J. Supercomput., 2003

Energy-efficient and parameterized designs for fast Fourier transform on FPGAs.

Seonil Choi, Gokul Govindu, Ju-wook Jang, Viktor K. Prasanna

Proceedings of the 2003 IEEE International Conference on Acoustics, 2003

Time and Energy Efficient Matrix Factorization Using FPGAs.

Seonil Choi, Viktor K. Prasanna

Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

Energy-efficient signal processing using FPGAs.

Seonil Choi, Ronald Scrofano, Viktor K. Prasanna, Ju-wook Jang

Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2003

Performance Modeling of Reconfigurable SoC Architectures and Energy-Efficient Mapping of a Class of Applications.

Jingzhao Ou, Seonil Choi, Viktor K. Prasanna

Proceedings of the 11th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2003), 2003

2002

Energy efficiency of FPGAs and programmable processors for matrix multiplication.

Ronald Scrofano, Seonil Choi, Viktor K. Prasanna

Proceedings of the 2002 IEEE International Conference on Field-Programmable Technology, 2002

Area and time efficient implementations of matrix multiplication on FPGAs.

Ju-wook Jang, Seonil Choi, Viktor K. Prasanna

Proceedings of the 2002 IEEE International Conference on Field-Programmable Technology, 2002

Energy-Efficient Matrix Multiplication on FPGAs.

Ju-wook Jang, Seonil Choi, Viktor K. Prasanna

Proceedings of the Field-Programmable Logic and Applications, 2002

A Model-Based Methodology for Application Specific Energy Efficient Data Path Design Using FPGAs.

Sumit Mohanty, Seonil Choi, Ju-wook Jang, Viktor K. Prasanna

Proceedings of the 13th IEEE International Conference on Application-Specific Systems, 2002

1997

Configurable Hardware for Symbolic Search Operations.

Seonil Choi, Viktor K. Prasanna, Yongwha Chung

Proceedings of the 1997 International Conference on Parallel and Distributed Systems (ICPADS '97), 1997

1996

Synthesis of memory-based VLSI architectures for discrete wavelet transforms.

Seonil Choi, Jongwoo Bae, Viktor K. Prasanna

Proceedings of the 8th European Signal Processing Conference, 1996