Tiago R. Balen
Orcid: 0000-0001-9641-300X
According to our database1,
Tiago R. Balen
authored at least 51 papers
between 2004 and 2023.
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Bibliography
2023
Evaluating the Reliability of Different Voting Schemes for Fault Tolerant Approximate Systems.
J. Electron. Test., August, 2023
Pseudosymmetric Enclosed Layout Transistors for Radiation Hardened Analog Applications.
IEEE Trans. Aerosp. Electron. Syst., April, 2023
Towards a Machine Learning Based Method for Indirect Test Generation of Mixed-Signal Circuits.
Proceedings of the 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2023
2022
Designing a 9.3μW Low-Power Time-to-Digital Converter (TDC) for a Time Assisted SAR ADC.
Proceedings of the 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2022
Proceedings of the 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2022
Evaluating Fault Coverage of Structural and Specification-based Tests Obtained With a Low-Cost Analog TPG Tool.
Proceedings of the 23rd IEEE Latin American Test Symposium, 2022
Evaluating Soft Error Reliability of Combinational Circuits Using a Monte Carlo Based Method.
Proceedings of the 23rd IEEE Latin American Test Symposium, 2022
Proceedings of the 13th IEEE Latin America Symposium on Circuits and System, 2022
2021
J. Electron. Test., 2021
Evaluation of Single Event Upset Susceptibility of FinFET-based SRAMs with Weak Resistive Defects.
J. Electron. Test., 2021
Proceedings of the 22nd IEEE Latin American Test Symposium, 2021
2020
J. Electron. Test., 2020
Comparing the Impact of Power Supply Voltage on CMOS- and FinFET-Based SRAMs in the Presence of Resistive Defects.
J. Electron. Test., 2020
Characterization of Enclosed Layout Transistors for Analog Applications on a130nm Technology.
Proceedings of the 33rd Symposium on Integrated Circuits and Systems Design, 2020
Proceedings of the 33rd Symposium on Integrated Circuits and Systems Design, 2020
Proceedings of the IEEE Latin-American Test Symposium, 2020
Evaluating the Impact of Ionizing Particles on FinFET -based SRAMs with Weak Resistive Defects.
Proceedings of the IEEE Latin-American Test Symposium, 2020
2019
Evaluating the Impact of Temperature on Dynamic Fault Behaviour of FinFET-Based SRAMs with Resistive Defects.
J. Electron. Test., 2019
Electromagnetic Immunity Test of Analog-to-Digital Interfaces of a Mixed-Signal Programmable SoC.
Proceedings of the IEEE Latin American Test Symposium, 2019
Proceedings of the IEEE Latin American Test Symposium, 2019
2018
Influence of temperature on dynamic fault behavior due to resistive defects in FinFET-based SRAMs.
Proceedings of the 19th IEEE Latin-American Test Symposium, 2018
2017
Microelectron. Reliab., 2017
Proceedings of the VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things, 2017
Proceedings of the 2017 IFIP/IEEE International Conference on Very Large Scale Integration, 2017
Proceedings of the 18th IEEE Latin American Test Symposium, 2017
Proceedings of the 18th IEEE Latin American Test Symposium, 2017
2016
J. Low Power Electron., 2016
Performance evaluation of radiation hardened analog circuits based on Enclosed Layout geometry.
Proceedings of the 17th Latin-American Test Symposium, 2016
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016
2015
Microelectron. Reliab., 2015
Testing fully differential amplifiers using common mode feedback circuit: A case study.
Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015
2014
Reliability Analysis of a 130nm Charge Redistribution SAR ADC under Single Event Effects.
Proceedings of the 27th Symposium on Integrated Circuits and Systems Design, 2014
Analysis of the effects of single event transients on an SAR-ADC based on charge redistribution.
Proceedings of the 15th Latin American Test Workshop, 2014
Design diversity redundancy with spatial-temporal voting applied to data acquisition systems.
Proceedings of the 15th Latin American Test Workshop, 2014
2013
Neutron-induced single event effects analysis in a SAR-ADC architecture embedded in a mixed-signal SoC.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2013
2012
Impact of TID-induced threshold deviations in analog building-blocks of operational amplifiers.
Proceedings of the 13th Latin American Test Workshop, 2012
2011
Fault Detection, Diagnosis and Prediction in Electrical Valves Using Self-Organizing Maps.
J. Electron. Test., 2011
Proceedings of the 12th Latin American Test Workshop, 2011
2010
Proceedings of the 23rd Annual Symposium on Integrated Circuits and Systems Design, 2010
Proceedings of the 11th Latin American Test Workshop, 2010
Proceedings of the 16th IEEE International On-Line Testing Symposium (IOLTS 2010), 2010
Increasing reliability of programmable mixed-signal systems by applying design diversity redundancy.
Proceedings of the 15th European Test Symposium, 2010
2009
Using Bulk Built-In Current Sensors and recomputing techniques to mitigate transient faults in microprocessors.
Proceedings of the 10th Latin American Test Workshop, 2009
2007
Built-In Self-Test of Field Programmable Analog Arrays based on Transient Response Analysis.
J. Electron. Test., 2007
Single Event Upset in SRAM-based Field Programmable Analog Arrays: Effects and Mitigation.
Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007
2006
Proceedings of the 24th IEEE VLSI Test Symposium (VTS 2006), 30 April, 2006
2005
Microelectron. J., 2005
J. Electron. Test., 2005
Testing the Interconnect Networks and I/O Resources of Field Programmable Analog Arrays.
Proceedings of the 23rd IEEE VLSI Test Symposium (VTS 2005), 2005
2004
Proceedings of the 22nd IEEE VLSI Test Symposium (VTS 2004), 2004
Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004