Lukás Fujcik

Orcid: 0000-0002-2085-5984

According to our database1, Lukás Fujcik authored at least 27 papers between 2006 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
A Fully Differential Analog Front-End for Signal Processing from EMG Sensor in 28 nm FDSOI Technology.
Sensors, April, 2023

2020
A 1 V 92 dB SNDR 10 kHz Bandwidth Second-Order Asynchronous Delta-Sigma Modulator for Biomedical Signal Processing.
Sensors, 2020

An Active Resistor With a Lower Sensitivity to Process Variations, and its Application in Current Reference.
IEEE Access, 2020

2016
Handheld potentiostat with embedded ASIC.
Proceedings of the 39th International Conference on Telecommunications and Signal Processing, 2016

Practically implemented electronically controlled CMOS voltage differencing current conveyor.
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016

2015
1 V Rectifier Based on Bulk-Driven Quasi-Floating-Gate Differential Difference Amplifiers.
Circuits Syst. Signal Process., 2015

Self-corrected compensating measurement of bolometer signal using ΔΣ modulation.
Proceedings of the 38th International Conference on Telecommunications and Signal Processing, 2015

Design of the 16bit ΔΣ converter for sensor signal processing.
Proceedings of the 38th International Conference on Telecommunications and Signal Processing, 2015

Area efficient implementation of fast fourier transform for ASIC.
Proceedings of the 38th International Conference on Telecommunications and Signal Processing, 2015

Reconfigurable 1<sup>st</sup> order filters based on differential voltage input and a single current output transconductance multiplier.
Proceedings of the IEEE EUROCON 2015, 2015

2013
Ultra-Low voltage Tunable transconductor Based on Bulk-Driven quasi-Floating-gate Technique.
J. Circuits Syst. Comput., 2013

SC ΣΔ converter for vibration sensor processing system.
Proceedings of the 36th International Conference on Telecommunications and Signal Processing, 2013

Field Programmable Neural Array for feed-forward neural networks.
Proceedings of the 36th International Conference on Telecommunications and Signal Processing, 2013

Optimized architecture of high order CIC filters.
Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems, 2013

2012
Comment on "High performance low-voltage QFG-based DVCC and a novel fully differential SC integrator based on it".
IEICE Electron. Express, 2012

2011
Novel on-chip sine wave generator.
Proceedings of the 34th International Conference on Telecommunications and Signal Processing (TSP 2011), 2011

2009
Sensor Signal Digitization Utilizing a Band-Pass Sigma-Delta Modulator.
IEICE Trans. Electron., 2009

REPOMO32 - New reconfigurable polymorphic integrated circuit for adaptive hardware.
Proceedings of the 2009 IEEE Workshop on Evolvable and Adaptive Hardware, 2009

Bandpass Sigma-Delta Modulator for Sensor Signal Processing.
Proceedings of the Fourth International Conference on Systems, 2009

Multi-core Computing Unit for Artificial Neural Networks in FPGA Chip.
Proceedings of the ICINCO 2009, 2009

2008
A Microconductometer Utilizing Bipolar Pulse Method for Electro-Chemical Sensors.
Proceedings of the Third International Conference on Systems, 2008

Digital Synchronization Utilizing Harmonic Signal Generator for Capacitive Pressure Sensor Measurement.
Proceedings of the Third International Conference on Systems, 2008

2007
Modeling and Design of a Novel Integrated Band-Pass Sigma-Delta Modulator.
Proceedings of the Personal Wireless Communications, 2007

2006
Single Chip Measurement System for Control Responses from TFT Sensors.
Proceedings of the Fifth International Conference on Networking and the International Conference on Systems (ICN / ICONS / MCL 2006), 2006

Modeling of 10-bits, 40 MHz, low power pipelined ADC utilizing novel background calibration.
Proceedings of the Fifth International Conference on Networking and the International Conference on Systems (ICN / ICONS / MCL 2006), 2006

Modeling and design of novel architecture of multibit switched-capacitor sigma-delta converter with two-step quantization process.
Proceedings of the Fifth International Conference on Networking and the International Conference on Systems (ICN / ICONS / MCL 2006), 2006

A 16-bit switched-capacitor sigma-delta modulator matlab model exploiting two-step quantization process.
Proceedings of the ICINCO 2006, 2006


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