Richard Ruzicka

According to our database, Richard Ruzicka authored at least 36 papers between 2000 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

Polymorphic RTL Computational Elements.

Richard Ruzicka, Václav Simek, Jan Nevoral

Proceedings of the 26th Euromicro Conference on Digital System Design, 2023

2022

Technology Mapping for PAIG Optimised Polymorphic Circuits.

Richard Ruzicka, Václav Simek

Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

2020

Power Consumption Analysis of New Generation of Polymorphic Gates.

Jan Nevoral, Václav Simek, Richard Ruzicka

Proceedings of the 23rd International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2020

KL-cuts influence on optimization of polymorphic circuits based on PAIG rewriting.

Adam Crha, Václav Simek, Richard Ruzicka

Proceedings of the 23rd International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2020

2019

PoLibSi: Path Towards Intrinsically Reconfigurable Components.

Jan Nevoral, Václav Simek, Richard Ruzicka

Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

PAIG Rewriting: The Way to Scalable Multifunctional Digital Circuits Synthesis.

Adam Crha, Václav Simek, Richard Ruzicka

Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

2018

Efficient Implementation of Bi-Functional RTL Components - Case Study.

Jan Nevoral, Richard Ruzicka

Proceedings of the 2018 New Generation of CAS, 2018

CMOS Gates with Second Function.

Jan Nevoral, Richard Ruzicka, Václav Simek

Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

Towards novel format for representation of polymorphic circuits.

Adam Crha, Václav Simek, Richard Ruzicka

Proceedings of the 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, 2018

From Ambipolarity to Multifunctionality: Novel Library of Polymorphic Gates Using Double-Gate FETs.

Jan Nevoral, Richard Ruzicka, Václav Simek

Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

2017

Compact library of efficient polymorphic gates based on ambipolar transistors.

Jan Nevoral, Václav Simek, Richard Ruzicka

Proceedings of the 12th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, 2017

Synthesis tool for design of complex polymorphic circuits.

Adam Crha, Richard Ruzicka, Václav Simek

Proceedings of the 12th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, 2017

2016

Evolutionary design of polymorphic gates using ambipolar transistors.

Jan Nevoral, Richard Ruzicka, Vojtech Mrazek

Proceedings of the 2016 IEEE Symposium Series on Computational Intelligence, 2016

Modelling and physical implementation of ambipolar components based on organic materials.

Václav Simek, Radek Tesar, Richard Ruzicka, Adam Crha

Proceedings of the 28th International Conference on Microelectronics, 2016

Lets move polymorphism downwards: On the multifunctional logic based on ambipolar behaviour of semiconductor devices.

Richard Ruzicka, Radek Tesar

Proceedings of the 2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era, 2016

2015

Synthesis Methodology of Polymorphic Circuits Using Polymorphic NAND/NOR Gates.

Adam Crha, Richard Ruzicka, Václav Simek

Proceedings of the UKSim-AMSS 17th International Conference on Computer Modelling and Simulation, 2015

Toward efficient synthesis method of multifunctional logic circuits.

Václav Simek, Richard Ruzicka, Adam Crha

Proceedings of the 27th International Conference on Microelectronics, 2015

2014

Resistant Gates for Polymorphic Electronics.

Radek Tesar, Richard Ruzicka, Václav Simek

Proceedings of the 2014 European Modelling Symposium, Pisa, Italy, October 21-23, 2014, 2014

Reconfigurable Platform with Polymorphic Digital Gates and Partial Reconfiguration Feature.

Václav Simek, Richard Ruzicka

Proceedings of the 2014 European Modelling Symposium, Pisa, Italy, October 21-23, 2014, 2014

Implementation of a Cellular Automaton with Globally Switchable Rules.

Václav Simek, Richard Ruzicka, Adam Crha, Radek Tesar

Proceedings of the Cellular Automata, 2014

2013

Implementing A Unique Chip Id On A Reconfigurable Polymorphic Circuit.

Lukás Sekanina, Richard Ruzicka, Zdenek Vasícek, Václav Simek, Petr Hanácek

Inf. Technol. Control., 2013

2012

NAND/NOR gate polymorphism in low temperature environment.

Richard Ruzicka, Václav Simek

Proceedings of the IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2012

2011

Chip Temperature Selfregulation for Digital Circuits Using Polymorphic Electronics Principles.

Richard Ruzicka, Václav Simek

Proceedings of the 14th Euromicro Conference on Digital System Design, 2011

Behavior of CMOS polymorphic circuits in high temperature environment.

Richard Ruzicka, Václav Simek, Lukás Sekanina

Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2011

2010

Gracefully Degrading Circuit Controllers Based on Polytronics.

Richard Ruzicka

Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

On analysis of fabricated polymorphic circuits.

Václav Simek, Richard Ruzicka, Lukás Sekanina

Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010

2009

REPOMO32 - New reconfigurable polymorphic integrated circuit for adaptive hardware.

Lukás Sekanina, Richard Ruzicka, Zdenek Vasícek, Roman Prokop, Lukás Fujcik

Proceedings of the 2009 IEEE Workshop on Evolvable and Adaptive Hardware, 2009

Dependable Controller Design Using Polymorphic Counters.

Richard Ruzicka

Proceedings of the 12th Euromicro Conference on Digital System Design, 2009

Polymorphic FIR Filters with Backup Mode Enabling Power Savings.

Lukás Sekanina, Richard Ruzicka, Zbysek Gajda

Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2009

2008

Physical Demonstration of Polymorphic Self-Checking Circuits.

Richard Ruzicka, Lukás Sekanina, Roman Prokop

Proceedings of the 14th IEEE International On-Line Testing Symposium (IOLTS 2008), 2008

2007

Test Controller Synthesis Constrained by Circuit Testability Analysis.

Richard Ruzicka, Josef Strnadel

Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007

2006

Evolutionary circuit design in REPOMO - reconfigurable polymorphic module.

Richard Ruzicka, Lukás Sekanina

Proceedings of the Second IASTED International Conference on Computational Intelligence, 2006

2004

Formal Approach to Synthesis of a Test Controller.

Richard Ruzicka, Pavel Tupec

Proceedings of the 11th IEEE International Conference on the Engineering of Computer-Based Systems (ECBS 2004), 2004

2003

Easily Testable Image Operators: The Class of Circuits Where Evolution Beats Engineers.

Lukás Sekanina, Richard Ruzicka

Proceedings of the 5th NASA / DoD Workshop on Evolvable Hardware (EH 2003), 2003

Testable Design Verification Using Petri Nets.

Richard Ruzicka

Proceedings of the 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), 2003

2000

Formal Approach to the RTL Testability Analysis.

Zdenek Kotásek, Richard Ruzicka, Jan Hlavicka

Proceedings of the 1st Latin American Test Workshop, 2000