M. Hanawa

According to our database, M. Hanawa authored at least 2 papers between 1988 and 1991.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

1991

On-Chip Multiple Superscalar Processors with Secondary Cache Memories.

M. Hanawa, Tadahiko Nishimukai, O. Nishii, Masato Suzuki, K. Yano, M. Hiraki, S. Shukuri, T. Nishida

Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991

1988

Cache-based pipeline architecture in the Hitachi H32/200 32-bit microprocessor.

Tadahiko Nishimukai, Hideo Inayoshi, Kikuko Takagi, Kazuhiko Iwasaki, Ikuya Kawasaki, M. Hanawa, Takeshi Okada

Proceedings of the Computer Design: VLSI in Computers and Processors, 1988