Magesh Sadasivam
According to our database1,
Magesh Sadasivam
authored at least 4 papers
between 2003 and 2004.
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Bibliography
2004
Autonomous Buffer Controller Design for Concurrent Execution in Block Level Pipelined Dataflow.
Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004
Glitching power reduction through supply voltage adaptation mechanism for low power array structure design.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Dynamically reconfigurable architecture for high-throughput processing of data centric applications.
Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, 2004
2003
Application Specific Coarse-Grained FPGA for Processing Element in Real-Time Parallel Particle Filters.
Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June, 2003