Magesh Sadasivam

According to our database, Magesh Sadasivam authored at least 4 papers between 2003 and 2004.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2004

Autonomous Buffer Controller Design for Concurrent Execution in Block Level Pipelined Dataflow.

Magesh Sadasivam, Sangjin Hong

Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004

Glitching power reduction through supply voltage adaptation mechanism for low power array structure design.

Sangjin Hong, Shu-Shin Chin, Magesh Sadasivam

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Dynamically reconfigurable architecture for high-throughput processing of data centric applications.

Magesh Sadasivam, Sangjin Hong

Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, 2004

2003

Application Specific Coarse-Grained FPGA for Processing Element in Real-Time Parallel Particle Filters.

Magesh Sadasivam, Sangjin Hong

Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June, 2003