Mahesh Mahadurkar

According to our database, Mahesh Mahadurkar authored at least 3 papers between 2014 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

Hardware Acceleration of SpMV Multiplier for Deep Learning.

Mahesh Mahadurkar, Nalesh Sivanandan, S. Kala

Proceedings of the 25th International Symposium on VLSI Design and Test, 2021

2015

Micro-architectural Enhancements in Distributed Memory CGRAs for LU and QR Factorizations.

Farhad Merchant, Arka Maity, Mahesh Mahadurkar, Kapil Vatwani, Ishan Munje, Madhava Krishna C, Nalesh Sivanandan, Nandhini Gopalan, Soumyendu Raha, S. K. Nandy, Ranjani Narayan

Proceedings of the 28th International Conference on VLSI Design, 2015

2014

Co-exploration of NLA kernels and specification of Compute Elements in distributed memory CGRAs.

Mahesh Mahadurkar, Farhad Merchant, Arka Maity, Kapil Vatwani, Ishan Munje, Nandhini Gopalan, S. K. Nandy, Ranjani Narayan

Proceedings of the XIVth International Conference on Embedded Computer Systems: Architectures, 2014