Mahmoud Elassal

According to our database1, Mahmoud Elassal authored at least 3 papers between 2002 and 2005.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2005
A systematic framework for high throughput MAP decoder VLSI architectures.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004
Power efficient architecture for (3, 6)-regular low-density parity-check code decoder.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2002
Low power SOVA architecture using bi-directional scheme.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002


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