Manisha Gambhir

According to our database, Manisha Gambhir authored at least 6 papers between 2007 and 2011.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2011

A 0.8 ps DNL Time-to-Digital Converter With 250 MHz Event Rate in 65 nm CMOS for Time-Mode-Based Sigma Delta Modulator.

Mohamed M. Elsayed, Vijay Dhanasekaran, Manisha Gambhir, José Silva-Martínez, Edgar Sánchez-Sinencio

IEEE J. Solid State Circuits, 2011

A Continuous Time Multi-Bit Delta Sigma ADC Using Time Domain Quantizer and Feedback Element.

Vijay Dhanasekaran, Manisha Gambhir, Mohamed M. Elsayed, Edgar Sánchez-Sinencio, José Silva-Martínez, Chinmaya Mishra, Lei Chen, Erik Pankratz

IEEE J. Solid State Circuits, 2011

2009

A 20MHz BW 68dB DR CT ΔΣ ADC based on a multi-bit time-domain quantizer and feedback element.

Vijay Dhanasekaran, Manisha Gambhir, Mohamed M. Elsayed, Edgar Sánchez-Sinencio, José Silva-Martínez, Chinmaya Mishra, Lei Chen, Erik Pankratz

Proceedings of the IEEE International Solid-State Circuits Conference, 2009

2008

A low power 1.3GHz dual-path current mode Gm-C filter.

Manisha Gambhir, Vijay Dhanasekaran, José Silva-Martínez, Edgar Sánchez-Sinencio

Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007

Low-Power Architecture and Circuit Techniques for High-Boost Wide-Band G_m-C Filters.

Manisha Gambhir, Vijay Dhanasekaran, José Silva-Martínez, Edgar Sánchez-Sinencio

IEEE Trans. Circuits Syst. I Regul. Pap., 2007

A 1.1 GHz Fifth Order Active-LC Butterworth Type Equalizing Filter.

Vijay Dhanasekaran, Manisha Gambhir, José Silva-Martínez, Edgar Sánchez-Sinencio

IEEE J. Solid State Circuits, 2007